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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Igor Grinbergc3373ee2014-11-05 14:25:35 +02002/*
3 * (C) Copyright 2013 CompuLab, Ltd.
4 * Author: Igor Grinberg <grinberg@compulab.co.il>
5 *
6 * Configuration settings for the CompuLab CM-T3517 board
Igor Grinbergc3373ee2014-11-05 14:25:35 +02007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * High Level Configuration Options
14 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020015#define CONFIG_CM_T3517 /* working with CM-T3517 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020016
Igor Grinbergc3373ee2014-11-05 14:25:35 +020017/*
18 * This is needed for the DMA stuff.
19 * Although the default iss 64, we still define it
20 * to be on the safe side once the default is changed.
21 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020022
Igor Grinbergc3373ee2014-11-05 14:25:35 +020023#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050024#include <asm/arch/omap.h>
Igor Grinbergc3373ee2014-11-05 14:25:35 +020025
Dmitry Lifshitza65120c2015-09-09 11:27:17 +030026#define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
27
Igor Grinbergc3373ee2014-11-05 14:25:35 +020028/* Clock Defines */
29#define V_OSCK 26000000 /* Clock output from T2 */
30#define V_SCLK (V_OSCK >> 1)
31
32#define CONFIG_MISC_INIT_R
33
Igor Grinbergc3373ee2014-11-05 14:25:35 +020034/*
35 * The early kernel mapping on ARM currently only maps from the base of DRAM
36 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
37 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
38 * so that leaves DRAM base to DRAM base + 0x4000 available.
39 */
40#define CONFIG_SYS_BOOTMAPSZ 0x4000
41
42#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
43#define CONFIG_SETUP_MEMORY_TAGS
44#define CONFIG_INITRD_TAG
45#define CONFIG_REVISION_TAG
46#define CONFIG_SERIAL_TAG
47
48/*
49 * Size of malloc() pool
50 */
Dmitry Lifshitz4fb49e02015-09-09 11:25:39 +030051#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020052#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
53
54/*
55 * Hardware drivers
56 */
57
58/*
59 * NS16550 Configuration
60 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020061#define CONFIG_SYS_NS16550_SERIAL
62#define CONFIG_SYS_NS16550_REG_SIZE (-4)
63#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
64
65/*
66 * select serial console configuration
67 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020068#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
69#define CONFIG_SERIAL3 3 /* UART3 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020070
71/* allow to overwrite serial and ethaddr */
72#define CONFIG_ENV_OVERWRITE
Igor Grinbergc3373ee2014-11-05 14:25:35 +020073#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
74 115200}
75
Igor Grinbergf7fd7e42014-11-03 11:32:25 +020076/* USB */
Igor Grinbergf7fd7e42014-11-03 11:32:25 +020077
78#ifndef CONFIG_USB_MUSB_AM35X
Igor Grinbergf7fd7e42014-11-03 11:32:25 +020079#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
80#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
Igor Grinbergf7fd7e42014-11-03 11:32:25 +020081#endif /* CONFIG_USB_MUSB_AM35X */
82
Igor Grinbergc3373ee2014-11-05 14:25:35 +020083/* commands to include */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020084
Igor Grinbergc3373ee2014-11-05 14:25:35 +020085#define CONFIG_SYS_I2C
Igor Grinbergc3373ee2014-11-05 14:25:35 +020086#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
87#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
88#define CONFIG_SYS_I2C_EEPROM_BUS 0
89#define CONFIG_I2C_MULTI_BUS
90
91/*
92 * Board NAND Info.
93 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +020094#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
95 /* to access nand */
96#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
97 /* to access nand at */
98 /* CS0 */
99#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
100 /* devices */
101
102/* Environment information */
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200103#define CONFIG_EXTRA_ENV_SETTINGS \
104 "loadaddr=0x82000000\0" \
105 "baudrate=115200\0" \
106 "console=ttyO2,115200n8\0" \
Dmitry Lifshitz0233cbc2015-09-08 09:50:00 +0300107 "netretry=yes\0" \
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200108 "mpurate=auto\0" \
109 "vram=12M\0" \
110 "dvimode=1024x768MR-16@60\0" \
111 "defaultdisplay=dvi\0" \
112 "mmcdev=0\0" \
113 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
114 "mmcrootfstype=ext4\0" \
115 "nandroot=/dev/mtdblock4 rw\0" \
116 "nandrootfstype=ubifs\0" \
117 "mmcargs=setenv bootargs console=${console} " \
118 "mpurate=${mpurate} " \
119 "vram=${vram} " \
120 "omapfb.mode=dvi:${dvimode} " \
121 "omapdss.def_disp=${defaultdisplay} " \
122 "root=${mmcroot} " \
123 "rootfstype=${mmcrootfstype}\0" \
124 "nandargs=setenv bootargs console=${console} " \
125 "mpurate=${mpurate} " \
126 "vram=${vram} " \
127 "omapfb.mode=dvi:${dvimode} " \
128 "omapdss.def_disp=${defaultdisplay} " \
129 "root=${nandroot} " \
130 "rootfstype=${nandrootfstype}\0" \
131 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
132 "bootscript=echo Running bootscript from mmc ...; " \
133 "source ${loadaddr}\0" \
134 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
135 "mmcboot=echo Booting from mmc ...; " \
136 "run mmcargs; " \
137 "bootm ${loadaddr}\0" \
138 "nandboot=echo Booting from nand ...; " \
139 "run nandargs; " \
140 "nand read ${loadaddr} 2a0000 400000; " \
141 "bootm ${loadaddr}\0" \
142
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200143#define CONFIG_BOOTCOMMAND \
144 "mmc dev ${mmcdev}; if mmc rescan; then " \
145 "if run loadbootscript; then " \
146 "run bootscript; " \
147 "else " \
148 "if run loaduimage; then " \
149 "run mmcboot; " \
150 "else run nandboot; " \
151 "fi; " \
152 "fi; " \
153 "else run nandboot; fi"
154
155/*
156 * Miscellaneous configurable options
157 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200158#define CONFIG_TIMESTAMP
159#define CONFIG_SYS_AUTOLOAD "no"
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200160#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200161#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200162
163#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
164
165/*
166 * AM3517 has 12 GP timers, they can be driven by the system clock
167 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
168 * This rate is divided by a local divisor.
169 */
170#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
171#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
172#define CONFIG_SYS_HZ 1000
173
174/*-----------------------------------------------------------------------
175 * Physical Memory Map
176 */
177#define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
178#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
179#define CONFIG_SYS_CS0_SIZE (256 << 20)
180
181/*-----------------------------------------------------------------------
182 * FLASH and environment organization
183 */
184
185/* **** PISMO SUPPORT *** */
186/* Monitor at start of flash */
187#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
188#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
189
Adam Ford6b1c1652017-09-04 21:08:02 -0500190#define CONFIG_ENV_OFFSET 0x260000
191#define CONFIG_ENV_ADDR 0x260000
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200192
Igor Grinbergdfb92d02014-11-03 11:32:26 +0200193#if defined(CONFIG_CMD_NET)
194#define CONFIG_DRIVER_TI_EMAC
195#define CONFIG_DRIVER_TI_EMAC_USE_RMII
196#define CONFIG_MII
Dmitry Lifshitz0233cbc2015-09-08 09:50:00 +0300197#define CONFIG_ARP_TIMEOUT 200UL
198#define CONFIG_NET_RETRY_COUNT 5
Igor Grinbergdfb92d02014-11-03 11:32:26 +0200199#endif /* CONFIG_CMD_NET */
200
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200201/* additions for new relocation code, must be added to all boards */
202#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
203#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
204#define CONFIG_SYS_INIT_RAM_SIZE 0x800
205#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
206 CONFIG_SYS_INIT_RAM_SIZE - \
207 GENERATED_GBL_DATA_SIZE)
208
209/* Status LED */
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200210#define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200211
Igor Grinberg62a95852014-11-03 11:32:27 +0200212/* Display Configuration */
Igor Grinberg62a95852014-11-03 11:32:27 +0200213#define CONFIG_VIDEO_OMAP3
214#define LCD_BPP LCD_COLOR16
215
Igor Grinberg62a95852014-11-03 11:32:27 +0200216#define CONFIG_SPLASH_SCREEN
217#define CONFIG_SPLASHIMAGE_GUARD
Igor Grinberg62a95852014-11-03 11:32:27 +0200218#define CONFIG_BMP_16BPP
219#define CONFIG_SCF0403_LCD
220
Nikita Kiryanov8e06caf2016-04-16 17:55:08 +0300221/* EEPROM */
Nikita Kiryanov8e06caf2016-04-16 17:55:08 +0300222#define CONFIG_ENV_EEPROM_IS_ON_I2C
223#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
224#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
225#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
226#define CONFIG_SYS_EEPROM_SIZE 256
227
Igor Grinbergc3373ee2014-11-05 14:25:35 +0200228#endif /* __CONFIG_H */