| Prafulla Wadaskar | c704e7a | 2010-12-07 15:23:39 +0530 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Marvell Semiconductor <www.marvell.com> |
| 4 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com>, |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 22 | * MA 02110-1301 USA |
| 23 | */ |
| 24 | |
| 25 | #include <common.h> |
| 26 | #include <asm/io.h> |
| 27 | #include <mvmfp.h> |
| 28 | #include <asm/arch/mfp.h> |
| Prafulla Wadaskar | c704e7a | 2010-12-07 15:23:39 +0530 | [diff] [blame] | 29 | |
| 30 | /* |
| 31 | * mfp_config |
| 32 | * |
| 33 | * On most of Marvell SoCs (ex. ARMADA100) there is Multi-Funtion-Pin |
| 34 | * configuration registers to configure each GPIO/Function pin on the |
| 35 | * SoC. |
| 36 | * |
| 37 | * This function reads the array of values for |
| 38 | * MFPR_X registers and programms them into respective |
| 39 | * Multi-Function Pin registers. |
| 40 | * It supports - Alternate Function Selection programming. |
| 41 | * |
| 42 | * Whereas, |
| 43 | * The Configureation value is constructed using MFP() |
| 44 | * array consists of 32bit values as defined in MFP(xx,xx..) macro |
| 45 | */ |
| 46 | void mfp_config(u32 *mfp_cfgs) |
| 47 | { |
| 48 | u32 *p_mfpr = NULL; |
| 49 | u32 cfg_val, val; |
| 50 | |
| 51 | do { |
| 52 | cfg_val = *mfp_cfgs++; |
| 53 | /* exit if End of configuration table detected */ |
| 54 | if (cfg_val == MFP_EOC) |
| 55 | break; |
| 56 | |
| 57 | p_mfpr = (u32 *)(MV_MFPR_BASE |
| 58 | + MFP_REG_GET_OFFSET(cfg_val)); |
| 59 | |
| 60 | /* Write a mfg register as per configuration */ |
| 61 | val = 0; |
| 62 | if (cfg_val & MFP_AF_FLAG) |
| 63 | /* Abstract and program Afternate-Func Selection */ |
| 64 | val |= cfg_val & MFP_AF_MASK; |
| 65 | if (cfg_val & MFP_EDGE_FLAG) |
| 66 | /* Abstract and program Edge configuration */ |
| 67 | val |= cfg_val & MFP_LPM_EDGE_MASK; |
| 68 | if (cfg_val & MFP_DRIVE_FLAG) |
| 69 | /* Abstract and program Drive configuration */ |
| 70 | val |= cfg_val & MFP_DRIVE_MASK; |
| 71 | if (cfg_val & MFP_PULL_FLAG) |
| 72 | /* Abstract and program Pullup/down configuration */ |
| 73 | val |= cfg_val & MFP_PULL_MASK; |
| 74 | |
| 75 | writel(val, p_mfpr); |
| 76 | } while (1); |
| 77 | /* |
| 78 | * perform a read-back of any MFPR register to make sure the |
| 79 | * previous writings are finished |
| 80 | */ |
| 81 | readl(p_mfpr); |
| 82 | } |