Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 89cdcaba82a5c8fbe0f614c78ad9887b87dad19d / . / configs / T2080RDB_revD_SDCARD_defconfig
blob: 1771c240036e9a626c06ae661720f38fc50931f9 [file] [log] [blame]
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]1CONFIG_PPC=y
2CONFIG_SYS_TEXT_BASE=0x00201000
3CONFIG_SPL_LIBCOMMON_SUPPORT=y
4CONFIG_SPL_LIBGENERIC_SUPPORT=y
5CONFIG_SYS_MEMTEST_START=0x00200000
6CONFIG_SYS_MEMTEST_END=0x00400000
7CONFIG_ENV_SIZE=0x2000
8CONFIG_ENV_OFFSET=0x100000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]10CONFIG_SPL_TEXT_BASE=0xFFFD8000
Tom Rini89cdcab2021-12-12 22:12:31 -0500[diff] [blame^]11CONFIG_VID=y
12CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv"
13CONFIG_VOL_MONITOR_IR36021_READ=y
14CONFIG_VOL_MONITOR_IR36021_SET=y
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]15CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]16CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]17CONFIG_SPL_DRIVERS_MISC=y
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]18CONFIG_SPL=y
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]19CONFIG_MPC85xx=y
20CONFIG_TARGET_T2080RDB=y
21CONFIG_T2080RDB_REV_D=y
22CONFIG_FIT=y
23CONFIG_FIT_VERBOSE=y
24CONFIG_OF_BOARD_SETUP=y
25CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini9ff815a2021-08-24 23:11:49 -0400[diff] [blame]26CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
27CONFIG_RAMBOOT_PBL=y
28CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
29CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg"
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]30CONFIG_BOOTDELAY=10
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]31CONFIG_USE_BOOTCOMMAND=y
32CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]33CONFIG_BOARD_EARLY_INIT_R=y
34# CONFIG_SPL_FRAMEWORK is not set
35CONFIG_SPL_MMC_BOOT=y
36CONFIG_SPL_FSL_PBL=y
37CONFIG_SPL_ENV_SUPPORT=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]38CONFIG_SPL_I2C=y
Simon Glass64571062021-08-08 12:20:16 -0600[diff] [blame]39CONFIG_SPL_MPC8XXX_INIT_DDR=y
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]40CONFIG_HUSH_PARSER=y
41CONFIG_CMD_IMLS=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]42CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]43CONFIG_CMD_MEMTEST=y
44CONFIG_SYS_ALT_MEMTEST=y
45CONFIG_CMD_DM=y
46CONFIG_CMD_I2C=y
47CONFIG_CMD_MMC=y
48CONFIG_CMD_USB=y
49CONFIG_CMD_DHCP=y
50CONFIG_CMD_MII=y
51CONFIG_CMD_PING=y
52CONFIG_MP=y
53CONFIG_CMD_EXT2=y
54CONFIG_CMD_FAT=y
55CONFIG_CMD_MTDPARTS=y
56CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
57CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)"
58# CONFIG_CMD_IRQ is not set
59CONFIG_OF_CONTROL=y
60CONFIG_ENV_OVERWRITE=y
61CONFIG_ENV_IS_IN_MMC=y
62CONFIG_DM=y
63CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]64CONFIG_DDR_CLK_FREQ=133330000
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]65CONFIG_DDR_ECC=y
66CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]67CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]68CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]69CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]70CONFIG_SYS_I2C_FSL=y
71CONFIG_SYS_FSL_I2C_OFFSET=0x118000
72CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
73CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
74CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
75CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
76CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
77CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]78CONFIG_SYS_I2C_EEPROM_ADDR=0x50
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]79CONFIG_FSL_ESDHC=y
80CONFIG_MTD=y
81CONFIG_MTD_NOR_FLASH=y
82CONFIG_FLASH_CFI_DRIVER=y
83CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
84CONFIG_FLASH_CFI_MTD=y
85CONFIG_SYS_FLASH_CFI=y
86CONFIG_DM_SPI_FLASH=y
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]87CONFIG_SF_DEFAULT_SPEED=10000000
88CONFIG_SPI_FLASH_STMICRO=y
89CONFIG_PHYLIB=y
90CONFIG_PHY_AQUANTIA=y
91CONFIG_PHY_CORTINA=y
92CONFIG_SYS_CORTINA_FW_IN_MMC=y
Kuldeep Singh016965f2021-08-10 11:20:07 +0530[diff] [blame]93CONFIG_CORTINA_FW_ADDR=0x114000
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]94CONFIG_PHY_REALTEK=y
95CONFIG_DM_ETH=y
96CONFIG_DM_MDIO=y
97CONFIG_E1000=y
98CONFIG_FMAN_ENET=y
Rajesh Bhagataec38012021-11-09 16:30:38 +0530[diff] [blame]99CONFIG_SYS_FMAN_FW_ADDR=0x104000
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]100CONFIG_MII=y
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]101CONFIG_DM_PCI_COMPAT=y
102CONFIG_PCIE_FSL=y
103CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
104CONFIG_DM_RTC=y
105CONFIG_RTC_DS1307=y
106CONFIG_SYS_NS16550=y
107CONFIG_SPI=y
108CONFIG_DM_SPI=y
109CONFIG_FSL_ESPI=y
110CONFIG_USB=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]111CONFIG_USB_EHCI_FSL=y
Camelia Groza9bf4db62021-06-11 15:28:08 +0300[diff] [blame]112CONFIG_USB_STORAGE=y
113CONFIG_ADDR_MAP=y
114CONFIG_SYS_NUM_ADDR_MAP=64