blob: 391aa00629980f145e4c8b36be92f15fcd6c65fd [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Rick Chenb46a18b2017-12-26 13:55:54 +08002/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chenb46a18b2017-12-26 13:55:54 +08005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Rick Chenc3027d02019-11-14 13:52:22 +080010#ifdef CONFIG_SPL
Rick Chenc3027d02019-11-14 13:52:22 +080011#define CONFIG_SPL_BSS_START_ADDR 0x04000000
Rick Chenc3027d02019-11-14 13:52:22 +080012#endif
13
Pragnesh Patel02038c32021-01-17 18:11:25 +053014#define RISCV_MMODE_TIMERBASE 0xe6000000
15#define RISCV_MMODE_TIMER_FREQ 60000000
16
17#define RISCV_SMODE_TIMER_FREQ 60000000
18
Rick Chenb46a18b2017-12-26 13:55:54 +080019/*
20 * CPU and Board Configuration Options
21 */
Rick Chenb46a18b2017-12-26 13:55:54 +080022
Rick Chenb46a18b2017-12-26 13:55:54 +080023/*
24 * Miscellaneous configurable options
25 */
Rick Chenb46a18b2017-12-26 13:55:54 +080026
Rick Chen40a6fe72018-03-29 10:08:33 +080027/* DT blob (fdt) address */
Rick Chen92919632019-04-30 13:49:37 +080028#define CONFIG_SYS_FDT_BASE 0x800f0000
Rick Chen40a6fe72018-03-29 10:08:33 +080029
Rick Chenb46a18b2017-12-26 13:55:54 +080030/*
31 * Physical Memory Map
32 */
Rick Chenb46a18b2017-12-26 13:55:54 +080033#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
34#define PHYS_SDRAM_1 \
35 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
36#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
37#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
38#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
39
40/*
41 * Serial console configuration
42 */
Rick Chenb46a18b2017-12-26 13:55:54 +080043#define CONFIG_SYS_NS16550_SERIAL
44#ifndef CONFIG_DM_SERIAL
45#define CONFIG_SYS_NS16550_REG_SIZE -4
46#endif
47#define CONFIG_SYS_NS16550_CLK 19660800
48
Rick Chenb46a18b2017-12-26 13:55:54 +080049/* Init Stack Pointer */
50#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
51 GENERATED_GBL_DATA_SIZE)
52
Rick Chenc6164142018-05-29 11:04:23 +080053/* support JEDEC */
Rick Chenc6164142018-05-29 11:04:23 +080054#define PHYS_FLASH_1 0x88000000 /* BANK 0 */
55#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
56#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, }
Rick Chenc6164142018-05-29 11:04:23 +080057
58#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */
59#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */
60
61/* max number of memory banks */
62/*
63 * There are 4 banks supported for this Controller,
64 * but we have only 1 bank connected to flash on board
65*/
Rick Chenc6164142018-05-29 11:04:23 +080066#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000}
67
68/* max number of sectors on one chip */
69#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2)
70#define CONFIG_SYS_MAX_FLASH_SECT 512
71
Rick Chenb46a18b2017-12-26 13:55:54 +080072/* environments */
Rick Chenb46a18b2017-12-26 13:55:54 +080073
74/* SPI FLASH */
Rick Chenb46a18b2017-12-26 13:55:54 +080075
76/*
77 * For booting Linux, the board info and command line data
78 * have to be in the first 16 MB of memory, since this is
79 * the maximum mapped by the Linux kernel during initialization.
80 */
81
82/* Initial Memory map for Linux*/
83#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
84/* Increase max gunzip size */
85#define CONFIG_SYS_BOOTM_LEN (64 << 20)
86
Leo Yu-Chi Liang919a0e72021-11-04 09:53:26 +080087/* Support autoboot from RAM (kernel image is loaded via debug port) */
88#define KERNEL_IMAGE_ADDR "0x2000000 "
89#define BOOTENV_DEV_NAME_RAM(devtypeu, devtypel, instance) \
90 "ram "
91#define BOOTENV_DEV_RAM(devtypeu, devtypel, instance) \
92 "bootcmd_ram=" \
93 "booti " \
94 KERNEL_IMAGE_ADDR \
95 "- $fdtcontroladdr\0"
96
Alexander Graf438b9be2018-04-23 07:59:49 +020097/* When we use RAM as ENV */
Alexander Graf438b9be2018-04-23 07:59:49 +020098
99/* Enable distro boot */
100#define BOOT_TARGET_DEVICES(func) \
101 func(MMC, mmc, 0) \
Leo Yu-Chi Liang919a0e72021-11-04 09:53:26 +0800102 func(DHCP, dhcp, na) \
103 func(RAM, ram, na)
Alexander Graf438b9be2018-04-23 07:59:49 +0200104#include <config_distro_bootcmd.h>
105
106#define CONFIG_EXTRA_ENV_SETTINGS \
107 "kernel_addr_r=0x00080000\0" \
108 "pxefile_addr_r=0x01f00000\0" \
109 "scriptaddr=0x01f00000\0" \
110 "fdt_addr_r=0x02000000\0" \
111 "ramdisk_addr_r=0x02800000\0" \
112 BOOTENV
113
Rick Chenb46a18b2017-12-26 13:55:54 +0800114#endif /* __CONFIG_H */