Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Qualcomm SDM845 chip device tree source |
| 4 | * |
| 5 | * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com> |
| 6 | * |
| 7 | */ |
| 8 | |
| 9 | /dts-v1/; |
| 10 | |
Sumit Garg | 8bdffc3 | 2022-07-12 12:42:06 +0530 | [diff] [blame] | 11 | #include <dt-bindings/clock/qcom,gcc-sdm845.h> |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 12 | #include "skeleton64.dtsi" |
| 13 | |
| 14 | / { |
| 15 | soc: soc { |
| 16 | #address-cells = <1>; |
| 17 | #size-cells = <1>; |
| 18 | ranges = <0 0 0 0xffffffff>; |
| 19 | compatible = "simple-bus"; |
| 20 | |
| 21 | gcc: clock-controller@100000 { |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 22 | compatible = "qcom,gcc-sdm845"; |
| 23 | reg = <0x100000 0x1f0000>; |
| 24 | #clock-cells = <1>; |
| 25 | #reset-cells = <1>; |
| 26 | #power-domain-cells = <1>; |
| 27 | }; |
| 28 | |
Caleb Connolly | fabb897 | 2023-11-14 12:55:42 +0000 | [diff] [blame] | 29 | tlmm: pinctrl@3400000 { |
Sumit Garg | b7572e5 | 2022-07-27 13:52:04 +0530 | [diff] [blame] | 30 | compatible = "qcom,sdm845-pinctrl"; |
Caleb Connolly | fabb897 | 2023-11-14 12:55:42 +0000 | [diff] [blame] | 31 | reg = <0x3400000 0xc00000>; |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 32 | gpio-count = <150>; |
| 33 | gpio-controller; |
| 34 | #gpio-cells = <2>; |
Caleb Connolly | fabb897 | 2023-11-14 12:55:42 +0000 | [diff] [blame] | 35 | gpio-ranges = <&tlmm 0 0 150>; |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 36 | |
| 37 | /* DEBUG UART */ |
| 38 | qup_uart9: qup-uart9-default { |
Dzmitry Sankouski | 8e3bdd5 | 2022-02-22 21:49:53 +0300 | [diff] [blame] | 39 | pins = "GPIO_4", "GPIO_5"; |
Sumit Garg | 60b7804 | 2022-07-12 12:42:07 +0530 | [diff] [blame] | 40 | function = "qup9"; |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 41 | }; |
| 42 | }; |
| 43 | |
Vladimir Zapolskiy | 5c5e8d4 | 2023-04-21 20:50:41 +0300 | [diff] [blame] | 44 | qupv3_id_1: geniqup@ac0000 { |
| 45 | compatible = "qcom,geni-se-qup"; |
| 46 | reg = <0x00ac0000 0x6000>; |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <1>; |
| 49 | ranges; |
| 50 | |
| 51 | uart9: serial@a84000 { |
| 52 | compatible = "qcom,geni-debug-uart"; |
| 53 | reg = <0xa84000 0x4000>; |
| 54 | clock-names = "se"; |
| 55 | clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; |
| 56 | pinctrl-names = "default"; |
| 57 | pinctrl-0 = <&qup_uart9>; |
| 58 | }; |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 59 | }; |
| 60 | |
| 61 | spmi@c440000 { |
| 62 | compatible = "qcom,spmi-pmic-arb"; |
| 63 | reg = <0xc440000 0x1100>, |
| 64 | <0xc600000 0x2000000>, |
| 65 | <0xe600000 0x100000>; |
| 66 | reg-names = "cnfg", "core", "obsrvr"; |
| 67 | #address-cells = <0x1>; |
| 68 | #size-cells = <0x1>; |
| 69 | |
| 70 | qcom,revid@100 { |
| 71 | compatible = "qcom,qpnp-revid"; |
| 72 | reg = <0x100 0x100>; |
| 73 | }; |
| 74 | |
| 75 | pmic0: pm8998@0 { |
| 76 | compatible = "qcom,spmi-pmic"; |
| 77 | reg = <0x0 0x1>; |
| 78 | #address-cells = <0x1>; |
| 79 | #size-cells = <0x1>; |
| 80 | |
Caleb Connolly | 89a90d0 | 2023-12-05 13:46:48 +0000 | [diff] [blame^] | 81 | pm8998_pon: pon@800 { |
| 82 | compatible = "qcom,pm8998-pon"; |
| 83 | |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 84 | reg = <0x800 0x100>; |
Caleb Connolly | 89a90d0 | 2023-12-05 13:46:48 +0000 | [diff] [blame^] | 85 | mode-bootloader = <0x2>; |
| 86 | mode-recovery = <0x1>; |
| 87 | |
| 88 | pm8998_pwrkey: pwrkey { |
| 89 | compatible = "qcom,pm8941-pwrkey"; |
| 90 | debounce = <15625>; |
| 91 | bias-pull-up; |
| 92 | }; |
| 93 | |
| 94 | pm8998_resin: resin { |
| 95 | compatible = "qcom,pm8941-resin"; |
| 96 | debounce = <15625>; |
| 97 | bias-pull-up; |
| 98 | status = "disabled"; |
| 99 | }; |
Dzmitry Sankouski | 2826cbd | 2021-10-17 13:44:31 +0300 | [diff] [blame] | 100 | }; |
| 101 | |
| 102 | pm8998_gpios: pm8998_gpios@c000 { |
| 103 | compatible = "qcom,pm8998-gpio"; |
| 104 | reg = <0xc000 0x1a00>; |
| 105 | gpio-controller; |
| 106 | gpio-count = <21>; |
| 107 | #gpio-cells = <2>; |
| 108 | gpio-bank-name = "pm8998."; |
| 109 | }; |
| 110 | }; |
| 111 | |
| 112 | pmic1: pm8998@1 { |
| 113 | compatible = "qcom,spmi-pmic"; |
| 114 | reg = <0x1 0x0>; |
| 115 | #address-cells = <0x2>; |
| 116 | #size-cells = <0x0>; |
| 117 | }; |
| 118 | }; |
| 119 | }; |
| 120 | }; |