blob: 144c42b210315c107a8a8b74dd83d5fcc437c416 [file] [log] [blame]
Marek Vasut0b16ba52022-04-12 17:26:01 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2022 Marek Vasut <marex@denx.de>
4 */
5
6#include "imx8mm-u-boot.dtsi"
7
8/ {
9 aliases {
10 eeprom0 = &eeprom;
11 mmc0 = &usdhc3; /* eMMC */
12 mmc1 = &usdhc2; /* MicroSD */
13 };
14
15 config {
16 dmo,ram-coding-gpios = <&gpio2 8 0>, <&gpio2 1 0>, <&gpio2 0 0>;
17 };
18
19 wdt-reboot {
20 compatible = "wdt-reboot";
21 wdt = <&wdog1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070022 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020023 };
24};
25
26&buck4_reg {
Simon Glassd3a98cb2023-02-13 08:56:33 -070027 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020028};
29
30&buck5_reg {
Simon Glassd3a98cb2023-02-13 08:56:33 -070031 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020032};
33
34&i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070035 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020036};
37
38&pinctrl_hog_sbc {
Simon Glassd3a98cb2023-02-13 08:56:33 -070039 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020040};
41
42&pinctrl_i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070043 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020044};
45
46&pinctrl_i2c1_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -070047 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020048};
49
50&pinctrl_pmic {
Simon Glassd3a98cb2023-02-13 08:56:33 -070051 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020052};
53
54&pinctrl_uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070055 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020056};
57
58&pinctrl_usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070059 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020060};
61
62&pinctrl_usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070063 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020064};
65
66&pmic {
Simon Glassd3a98cb2023-02-13 08:56:33 -070067 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020068
69 regulators {
Simon Glassd3a98cb2023-02-13 08:56:33 -070070 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020071 };
72};
73
74&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070075 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020076};
77
78&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070079 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020080};
81
82&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070083 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020084};
85
86&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070087 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020088};
89
90&gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070091 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020092};
93
94&uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070095 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +020096};
97
98&usbotg1 {
99 dr_mode = "peripheral";
100};
101
102&usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700103 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +0200104 sd-uhs-sdr104;
105 sd-uhs-ddr50;
106};
107
108&usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700109 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +0200110 mmc-hs400-1_8v;
111 mmc-hs400-enhanced-strobe;
112};
113
114&wdog1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700115 bootph-pre-ram;
Marek Vasut0b16ba52022-04-12 17:26:01 +0200116};