blob: 6823b42d45145211d494c5749164863e2872d38e [file] [log] [blame]
Marcel Ziswiler691f4602022-07-21 15:27:31 +02001// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
Igor Opaniuk1ec7c002019-10-16 13:39:35 +03002/*
Marcel Ziswiler691f4602022-07-21 15:27:31 +02003 * Copyright 2019-2022 Toradex
Igor Opaniuk1ec7c002019-10-16 13:39:35 +03004 */
Igor Opaniukddfe8382019-10-16 13:39:36 +03005
Igor Opaniuk2ee70452020-07-15 13:31:00 +03006/ {
7 aliases {
Simon Glassd3a98cb2023-02-13 08:56:33 -07008 bootph-all;
Igor Opaniuk2ee70452020-07-15 13:31:00 +03009 usb0 = &usbotg1; /* required for ums */
10 display0 = &lcdif;
11 };
12};
13
Igor Opaniukddfe8382019-10-16 13:39:36 +030014&pinctrl_uart1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070015 bootph-all;
Igor Opaniukddfe8382019-10-16 13:39:36 +030016};
17
18&pinctrl_uart1_ctrl1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070019 bootph-all;
Igor Opaniuk2ee70452020-07-15 13:31:00 +030020};
21
22&lcdif {
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_lcdif_dat
25 &pinctrl_lcdif_ctrl>;
26 status = "okay";
27 display = <&display0>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070028 bootph-all;
Igor Opaniuk2ee70452020-07-15 13:31:00 +030029
30 display0: display0 {
31 bits-per-pixel = <18>;
32 bus-width = <24>;
33 status = "okay";
34
35 display-timings {
36 native-mode = <&timing_vga>;
37 timing_vga: 640x480 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070038 bootph-all;
Igor Opaniuk2ee70452020-07-15 13:31:00 +030039 clock-frequency = <25175000>;
40 hactive = <640>;
41 vactive = <480>;
42 hback-porch = <40>;
43 hfront-porch = <24>;
44 vback-porch = <32>;
45 vfront-porch = <11>;
46 hsync-len = <96>;
47 vsync-len = <2>;
48
49 de-active = <1>;
50 hsync-active = <0>;
51 vsync-active = <0>;
52 pixelclk-active = <0>;
53 };
54 };
55 };
Igor Opaniukddfe8382019-10-16 13:39:36 +030056};