Paweł Anikiel | 3515aed | 2022-06-17 12:47:19 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright 2022 Google LLC |
| 4 | */ |
| 5 | /dts-v1/; |
| 6 | |
| 7 | / { |
| 8 | description = "FIT image with FPGA bistream"; |
| 9 | #address-cells = <1>; |
| 10 | |
| 11 | images { |
| 12 | fpga-periph-1 { |
| 13 | description = "FPGA peripheral bitstream"; |
| 14 | data = /incbin/("../../../periph.rbf"); |
| 15 | type = "fpga"; |
| 16 | arch = "arm"; |
| 17 | compression = "none"; |
| 18 | }; |
| 19 | fpga-core-1 { |
| 20 | description = "FPGA core bitstream"; |
| 21 | data = /incbin/("../../../core.rbf"); |
| 22 | type = "fpga"; |
| 23 | arch = "arm"; |
| 24 | compression = "none"; |
| 25 | }; |
| 26 | }; |
| 27 | |
| 28 | configurations { |
| 29 | default = "config-1"; |
| 30 | config-1 { |
| 31 | description = "Boot with FPGA config"; |
| 32 | fpga = "fpga-periph-1", "fpga-core-1"; |
| 33 | }; |
| 34 | }; |
| 35 | }; |