| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | Freescale Enhanced Serial Audio Interface (ESAI) Controller |
| 2 | |
| 3 | The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port |
| 4 | for serial communication with a variety of serial devices, including industry |
| 5 | standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and |
| 6 | other DSPs. It has up to six transmitters and four receivers. |
| 7 | |
| 8 | Required properties: |
| 9 | |
| 10 | - compatible : Compatible list, should contain one of the following |
| 11 | compatibles: |
| 12 | "fsl,imx35-esai", |
| 13 | "fsl,vf610-esai", |
| 14 | "fsl,imx6ull-esai", |
| 15 | "fsl,imx8qm-esai", |
| 16 | |
| 17 | - reg : Offset and length of the register set for the device. |
| 18 | |
| 19 | - interrupts : Contains the spdif interrupt. |
| 20 | |
| 21 | - dmas : Generic dma devicetree binding as described in |
| 22 | Documentation/devicetree/bindings/dma/dma.txt. |
| 23 | |
| 24 | - dma-names : Two dmas have to be defined, "tx" and "rx". |
| 25 | |
| 26 | - clocks : Contains an entry for each entry in clock-names. |
| 27 | |
| 28 | - clock-names : Includes the following entries: |
| 29 | "core" The core clock used to access registers |
| 30 | "extal" The esai baud clock for esai controller used to |
| 31 | derive HCK, SCK and FS. |
| 32 | "fsys" The system clock derived from ahb clock used to |
| 33 | derive HCK, SCK and FS. |
| 34 | "spba" The spba clock is required when ESAI is placed as a |
| 35 | bus slave of the Shared Peripheral Bus and when two |
| 36 | or more bus masters (CPU, DMA or DSP) try to access |
| 37 | it. This property is optional depending on the SoC |
| 38 | design. |
| 39 | |
| 40 | - fsl,fifo-depth : The number of elements in the transmit and receive |
| 41 | FIFOs. This number is the maximum allowed value for |
| 42 | TFCR[TFWM] or RFCR[RFWM]. |
| 43 | |
| 44 | - fsl,esai-synchronous: This is a boolean property. If present, indicating |
| 45 | that ESAI would work in the synchronous mode, which |
| 46 | means all the settings for Receiving would be |
| 47 | duplicated from Transmission related registers. |
| 48 | |
| 49 | Optional properties: |
| 50 | |
| 51 | - big-endian : If this property is absent, the native endian mode |
| 52 | will be in use as default, or the big endian mode |
| 53 | will be in use for all the device registers. |
| 54 | |
| 55 | Example: |
| 56 | |
| 57 | esai: esai@2024000 { |
| 58 | compatible = "fsl,imx35-esai"; |
| 59 | reg = <0x02024000 0x4000>; |
| 60 | interrupts = <0 51 0x04>; |
| 61 | clocks = <&clks 208>, <&clks 118>, <&clks 208>; |
| 62 | clock-names = "core", "extal", "fsys"; |
| 63 | dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; |
| 64 | dma-names = "rx", "tx"; |
| 65 | fsl,fifo-depth = <128>; |
| 66 | fsl,esai-synchronous; |
| 67 | big-endian; |
| 68 | }; |