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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babic4c8d4122016-06-06 11:19:42 +02002/*
3 * Copyright (C) Stefano Babic <sbabic@denx.de>
4 *
5 * Configuration settings for the E+L i.MX6Q DO82 board.
Stefano Babic4c8d4122016-06-06 11:19:42 +02006 */
7
8#ifndef __EL6Q_COMMON_CONFIG_H
9#define __EL6Q_COMMON_CONFIG_H
10
Simon Glassfb64e362020-05-10 11:40:09 -060011#include <linux/stringify.h>
12
Stefano Babic4c8d4122016-06-06 11:19:42 +020013#define CONFIG_BOARD_NAME EL6Q
14
Stefano Babic4c8d4122016-06-06 11:19:42 +020015#include "mx6_common.h"
16
17#define CONFIG_IMX_THERMAL
18
19/* Size of malloc() pool */
20#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
21
Stefano Babic4c8d4122016-06-06 11:19:42 +020022#ifdef CONFIG_SPL
Stefano Babic4c8d4122016-06-06 11:19:42 +020023#include "imx6_spl.h"
24#endif
25
26/* MMC Configs */
27#define CONFIG_SYS_FSL_ESDHC_ADDR 0
28#define CONFIG_SYS_FSL_USDHC_NUM 2
29
30/* I2C config */
31#define CONFIG_SYS_I2C
32#define CONFIG_SYS_I2C_MXC
33#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
34#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
35#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
36#define CONFIG_SYS_I2C_SPEED 100000
37
38/* PMIC */
39#define CONFIG_POWER
40#define CONFIG_POWER_I2C
41#define CONFIG_POWER_PFUZE100
42#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
43
44/* Commands */
Stefano Babic4c8d4122016-06-06 11:19:42 +020045
Stefano Babic4c8d4122016-06-06 11:19:42 +020046#define CONFIG_MXC_UART_BASE UART2_BASE
Stefano Babic4c8d4122016-06-06 11:19:42 +020047
Stefano Babic4c8d4122016-06-06 11:19:42 +020048#define CONFIG_BOARD_NAME EL6Q
49
Stefano Babic4c8d4122016-06-06 11:19:42 +020050#define CONFIG_EXTRA_ENV_SETTINGS \
51 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
52 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
53 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
Simon Glass4694a742016-10-17 20:12:39 -060054 "console=" CONSOLE_DEV "\0" \
Stefano Babic4c8d4122016-06-06 11:19:42 +020055 "fdtfile=undefined\0" \
56 "fdt_high=0xffffffff\0" \
57 "fdt_addr_r=0x18000000\0" \
58 "fdt_addr=0x18000000\0" \
59 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
60 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
61 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
62 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
63 BOOTENV
64
65#define BOOT_TARGET_DEVICES(func) \
66 func(MMC, mmc, 0) \
67 func(MMC, mmc, 1) \
68 func(PXE, PXE, na) \
69 func(DHCP, dhcp, na)
70
Stefano Babic4c8d4122016-06-06 11:19:42 +020071#include <config_distro_bootcmd.h>
72
73#define CONFIG_ARP_TIMEOUT 200UL
74
Stefano Babic4c8d4122016-06-06 11:19:42 +020075/* Physical Memory Map */
Stefano Babic4c8d4122016-06-06 11:19:42 +020076#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
77
78#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
79#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
80#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
81
82#define CONFIG_SYS_INIT_SP_OFFSET \
83 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
84#define CONFIG_SYS_INIT_SP_ADDR \
85 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
86
Masahiro Yamada8cea9b52017-02-11 22:43:54 +090087/* environment organization */
Stefano Babic4c8d4122016-06-06 11:19:42 +020088
Stefano Babic4c8d4122016-06-06 11:19:42 +020089#endif /* __EL6Q_COMMON_CONFIG_H */