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git01.mediatek.com / filogic / uboot / 88dada7285256c623c2b933c3f02a3f51d91cd88 / . / configs / T1042RDB_PI_SPIFLASH_defconfig
blob: 8c36654544e9e9b844d0b5da321e5ffef50b2134 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0x30001000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]3CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]4CONFIG_SPL_LIBGENERIC_SUPPORT=y
Simon Glasse076d6f2016-09-12 23:18:56 -0600[diff] [blame]5CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rini947f71e2016-09-19 17:00:58 -0400[diff] [blame]6CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]7CONFIG_SPL=y
Simon Glass219d6122016-09-12 23:18:57 -0600[diff] [blame]8CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassb24fdca2016-09-12 23:18:58 -0600[diff] [blame]9CONFIG_SPL_SPI_SUPPORT=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]10CONFIG_MPC85xx=y
York Sune9c8dcf2016-11-18 13:44:00 -0800[diff] [blame]11CONFIG_TARGET_T1042RDB_PI=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]12CONFIG_FIT=y
13CONFIG_FIT_VERBOSE=y
14CONFIG_OF_BOARD_SETUP=y
15CONFIG_OF_STDOUT_VIA_ALIAS=y
York Sune9c8dcf2016-11-18 13:44:00 -0800[diff] [blame]16CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]17CONFIG_BOOTDELAY=10
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]18CONFIG_SILENT_CONSOLE=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]19# CONFIG_CONSOLE_MUX is not set
20CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]21CONFIG_BOARD_EARLY_INIT_F=y
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]22CONFIG_BOARD_EARLY_INIT_R=y
Tom Rini623d67e2018-02-06 12:15:38 -0500[diff] [blame]23# CONFIG_SPL_FRAMEWORK is not set
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]24CONFIG_SPL_ENV_SUPPORT=y
25CONFIG_SPL_I2C_SUPPORT=y
Simon Glass7db65a82016-09-12 23:18:45 -0600[diff] [blame]26CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]27CONFIG_HUSH_PARSER=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]28CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_GREPENV=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]30CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]31CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]32CONFIG_CMD_SF=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]33CONFIG_CMD_USB=y
34CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]36CONFIG_CMD_PING=y
Simon Glassb575bfc2017-04-26 22:27:55 -0600[diff] [blame]37CONFIG_CMD_BMP=y
Chris Packham3e257df2017-04-29 15:20:28 +1200[diff] [blame]38CONFIG_CMD_DATE=y
Siva Durga Prasad Paladugu8e45f1a2018-06-19 12:24:23 +0200[diff] [blame]39CONFIG_MP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]40CONFIG_CMD_EXT2=y
41CONFIG_CMD_FAT=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]42CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
43CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]44CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]45CONFIG_FSL_CAAM=y
York Sund297d392016-12-28 08:43:40 -0800[diff] [blame]46CONFIG_SYS_FSL_DDR3=y
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]47CONFIG_FSL_ESDHC=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]48CONFIG_MTD_NOR_FLASH=y
49CONFIG_FLASH_CFI_DRIVER=y
50CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
51CONFIG_FLASH_CFI_MTD=y
52CONFIG_SYS_FLASH_CFI=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]53CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]54CONFIG_SPI_FLASH_STMICRO=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]55CONFIG_PHYLIB=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]56CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]57CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]58CONFIG_MII=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]59CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]60CONFIG_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]61CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]62CONFIG_USB=y
63CONFIG_USB_STORAGE=y
Tom Rinie9836922017-10-30 12:58:33 -0400[diff] [blame]64CONFIG_VIDEO=y
Simon Glass8d0efc12016-10-17 20:12:42 -0600[diff] [blame]65CONFIG_CFB_CONSOLE_ANSI=y
Simon Glassa66c5412016-02-22 22:55:42 -0700[diff] [blame]66CONFIG_OF_LIBFDT=y