blob: 6623fb7ae10053db55957e708723eaab7a28eaee [file] [log] [blame]
Kumar Gala4c882892009-02-05 20:40:57 -06001/*
Mike Frysinger18a407c2009-04-24 17:22:40 -04002 * config.h - setup common defines for Blackfin boards based on config.h
Kumar Gala4c882892009-02-05 20:40:57 -06003 *
Mike Frysinger18a407c2009-04-24 17:22:40 -04004 * Copyright (c) 2007-2009 Analog Devices Inc.
Kumar Gala4c882892009-02-05 20:40:57 -06005 *
Mike Frysinger18a407c2009-04-24 17:22:40 -04006 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef __ASM_BLACKFIN_CONFIG_POST_H__
10#define __ASM_BLACKFIN_CONFIG_POST_H__
11
12/* Sanity check CONFIG_BFIN_CPU */
13#ifndef CONFIG_BFIN_CPU
14# error CONFIG_BFIN_CPU: your board config needs to define this
15#endif
16
17/* Make sure the structure is properly aligned */
18#if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR)
19# error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned
20#endif
21
22/* Set default CONFIG_VCO_HZ if need be */
23#if !defined(CONFIG_VCO_HZ)
24# if (CONFIG_CLKIN_HALF == 0)
25# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
26# else
27# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2)
28# endif
29#endif
30
31/* Set default CONFIG_CCLK_HZ if need be */
32#if !defined(CONFIG_CCLK_HZ)
33# if (CONFIG_PLL_BYPASS == 0)
34# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV)
35# else
36# define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
37# endif
38#endif
39
40/* Set default CONFIG_SCLK_HZ if need be */
41#if !defined(CONFIG_SCLK_HZ)
42# if (CONFIG_PLL_BYPASS == 0)
43# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV)
44# else
45# define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
46# endif
47#endif
48
49/* Since we use these to program PLL registers directly,
50 * make sure the values are sane and won't screw us up.
Kumar Gala4c882892009-02-05 20:40:57 -060051 */
Mike Frysinger18a407c2009-04-24 17:22:40 -040052#if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT
53# error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63)
54#endif
55#if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF
56# error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1
57#endif
58#if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS
59# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1
60#endif
61
62/* Using L1 scratch pad makes sense for everyone by default. */
63#ifndef CONFIG_LINUX_CMDLINE_ADDR
64# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH
65#endif
66#ifndef CONFIG_LINUX_CMDLINE_SIZE
67# define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE
68#endif
69
70/* Set default SPI flash CS to the one we boot from */
71#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_SPI_CS)
72# define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL
73#endif
74
75/* Default/common Blackfin memory layout */
76#ifndef CONFIG_SYS_SDRAM_BASE
77# define CONFIG_SYS_SDRAM_BASE 0
78#endif
79#ifndef CONFIG_SYS_MAX_RAM_SIZE
80# define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024)
81#endif
82#ifndef CONFIG_SYS_MONITOR_BASE
83# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN)
84#endif
85#ifndef CONFIG_SYS_MALLOC_BASE
86# define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
87#endif
88#ifndef CONFIG_SYS_GBL_DATA_SIZE
89# define CONFIG_SYS_GBL_DATA_SIZE (128)
90#endif
91#ifndef CONFIG_SYS_GBL_DATA_ADDR
92# define CONFIG_SYS_GBL_DATA_ADDR (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
93#endif
94#ifndef CONFIG_STACKBASE
95# define CONFIG_STACKBASE (CONFIG_SYS_GBL_DATA_ADDR - 4)
96#endif
97#ifndef CONFIG_SYS_MEMTEST_START
98# define CONFIG_SYS_MEMTEST_START 0
99#endif
100#ifndef CONFIG_SYS_MEMTEST_END
101# define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4)
102#endif
103
104/* Check to make sure everything fits in external RAM */
105#if ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE)
106# error Memory Map does not fit into configuration
107#endif
Kumar Gala4c882892009-02-05 20:40:57 -0600108
Mike Frysinger18a407c2009-04-24 17:22:40 -0400109/* Default/common Blackfin environment settings */
110#ifndef CONFIG_LOADADDR
111# define CONFIG_LOADADDR 0x1000000
112#endif
113#ifndef CONFIG_SYS_LOAD_ADDR
114# define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
115#endif
116#ifndef CONFIG_SYS_BOOTM_LEN
117# define CONFIG_SYS_BOOTM_LEN 0x4000000
118#endif
119#ifndef CONFIG_SYS_PROMPT
120# define CONFIG_SYS_PROMPT "bfin> "
121#endif
122#ifndef CONFIG_SYS_CBSIZE
123# ifdef CONFIG_CMD_KGDB
124# define CONFIG_SYS_CBSIZE 1024
125# else
126# define CONFIG_SYS_CBSIZE 256
127# endif
128#endif
129#ifndef CONFIG_SYS_BARGSIZE
130# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
131#endif
132#ifndef CONFIG_SYS_PBSIZE
133# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
134#endif
135#ifndef CONFIG_SYS_MAXARGS
136# define CONFIG_SYS_MAXARGS 16
137#endif
138#if defined(CONFIG_SYS_HZ)
139# if (CONFIG_SYS_HZ != 1000)
140# warning "CONFIG_SYS_HZ must always be 1000"
141# endif
142# undef CONFIG_SYS_HZ
143#endif
144#define CONFIG_SYS_HZ 1000
145#ifndef CONFIG_SYS_BAUDRATE_TABLE
146# define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
147#endif
Kumar Gala4c882892009-02-05 20:40:57 -0600148
149#endif