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git01.mediatek.com / filogic / uboot / 88ada20242f9b6f1edf0acd892c292b62b17ff9d / . / configs / db-88f6820-gp_defconfig
blob: 7beca5d80b0c906ff5d98c1ecc19256d7c344050 [file] [log] [blame]
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]3CONFIG_ARCH_MVEBU=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x00800000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]5CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]6CONFIG_SPL_LIBGENERIC_SUPPORT=y
Masahiro Yamada75794f92016-09-19 21:40:26 +0900[diff] [blame]7CONFIG_SYS_MALLOC_F_LEN=0x2000
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]8CONFIG_TARGET_DB_88F6820_GP=y
Simon Glasse076d6f2016-09-12 23:18:56 -0600[diff] [blame]9CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]10CONFIG_NR_DRAM_BANKS=2
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]11CONFIG_SPL=y
12CONFIG_DEBUG_UART_BASE=0xd0012000
13CONFIG_DEBUG_UART_CLOCK=250000000
Simon Glass219d6122016-09-12 23:18:57 -0600[diff] [blame]14CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassb24fdca2016-09-12 23:18:58 -0600[diff] [blame]15CONFIG_SPL_SPI_SUPPORT=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]16CONFIG_DEBUG_UART=y
Stefan Roesed8f47d02019-05-03 08:42:19 +0200[diff] [blame]17CONFIG_AHCI=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]18CONFIG_BOOTDELAY=3
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]19CONFIG_USE_PREBOOT=y
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]20CONFIG_SYS_CONSOLE_INFO_QUIET=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]21# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]22CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Goldschmidtcc4078c2018-09-30 14:31:53 +0200[diff] [blame]23CONFIG_SPL_TEXT_BASE=0x40000030
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]24CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
25CONFIG_SPL_I2C_SUPPORT=y
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]26CONFIG_SPL_SPI_LOAD=y
Hannes Schmelzer38df9972019-08-22 15:41:46 +0200[diff] [blame]27CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]28# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]29CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]30CONFIG_CMD_MMC=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]31CONFIG_CMD_PCI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]32CONFIG_CMD_SF=y
33CONFIG_CMD_SPI=y
Stefan Roese6ba24492015-09-01 13:05:09 +0200[diff] [blame]34CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]35# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]36CONFIG_CMD_DHCP=y
Tom Rinie8f8d672018-04-17 09:22:31 -0400[diff] [blame]37CONFIG_CMD_TFTPPUT=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]38CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]39CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]40CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]41CONFIG_CMD_TIME=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_EXT2=y
43CONFIG_CMD_EXT4=y
44CONFIG_CMD_FAT=y
45CONFIG_CMD_FS_GENERIC=y
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]46CONFIG_EFI_PARTITION=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]47# CONFIG_PARTITION_UUIDS is not set
48# CONFIG_SPL_PARTITION_UUIDS is not set
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]49CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]50CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]51CONFIG_USE_ENV_SPI_MAX_HZ=y
52CONFIG_ENV_SPI_MAX_HZ=50000000
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]53CONFIG_SPL_OF_TRANSLATE=y
Stefan Roesed8f47d02019-05-03 08:42:19 +0200[diff] [blame]54CONFIG_AHCI_MVEBU=y
55CONFIG_DM_MMC=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]56CONFIG_MMC_SDHCI=y
Masahiro Yamada124f6ce2016-12-07 22:10:29 +0900[diff] [blame]57CONFIG_MMC_SDHCI_SDMA=y
58CONFIG_MMC_SDHCI_MV=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]59CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]60CONFIG_SPI_FLASH_MACRONIX=y
61CONFIG_SPI_FLASH_STMICRO=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]62CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]63CONFIG_PHY_GIGE=y
Chris Packham919041c2017-08-21 20:17:03 +1200[diff] [blame]64CONFIG_MVNETA=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]65CONFIG_MII=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]66CONFIG_PCI=y
Stefan Roese3179ec62019-01-25 11:52:43 +0100[diff] [blame]67CONFIG_PCI_MVEBU=y
Tom Rinie791a022017-08-11 11:20:19 -0400[diff] [blame]68CONFIG_SCSI=y
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]69CONFIG_DEBUG_UART_SHIFT=2
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]70CONFIG_SYS_NS16550=y
Tuomas Tynkkynen13b5cb82018-02-07 02:42:22 +0200[diff] [blame]71CONFIG_KIRKWOOD_SPI=y
Stefan Roese6ba24492015-09-01 13:05:09 +0200[diff] [blame]72CONFIG_USB=y
73CONFIG_DM_USB=y
74CONFIG_USB_EHCI_HCD=y
75CONFIG_USB_STORAGE=y