Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2019 BayLibre SAS. All rights reserved. |
| 4 | * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com> |
| 5 | * |
| 6 | * AC200/AC202 = S905D3 |
| 7 | * AC213/AC214 = S905X3 |
| 8 | * |
| 9 | */ |
| 10 | |
| 11 | #include "meson-sm1.dtsi" |
| 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <dt-bindings/gpio/meson-g12a-gpio.h> |
| 14 | #include <dt-bindings/input/input.h> |
| 15 | |
| 16 | / { |
| 17 | aliases { |
| 18 | serial0 = &uart_AO; |
| 19 | ethernet0 = ðmac; |
| 20 | }; |
| 21 | |
| 22 | chosen { |
| 23 | stdout-path = "serial0:115200n8"; |
| 24 | }; |
| 25 | |
| 26 | emmc_pwrseq: emmc-pwrseq { |
| 27 | compatible = "mmc-pwrseq-emmc"; |
| 28 | reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; |
| 29 | }; |
| 30 | |
| 31 | cvbs-connector { |
| 32 | compatible = "composite-video-connector"; |
| 33 | |
| 34 | port { |
| 35 | cvbs_connector_in: endpoint { |
| 36 | remote-endpoint = <&cvbs_vdac_out>; |
| 37 | }; |
| 38 | }; |
| 39 | }; |
| 40 | |
| 41 | hdmi-connector { |
| 42 | compatible = "hdmi-connector"; |
| 43 | type = "a"; |
| 44 | |
| 45 | port { |
| 46 | hdmi_connector_in: endpoint { |
| 47 | remote-endpoint = <&hdmi_tx_tmds_out>; |
| 48 | }; |
| 49 | }; |
| 50 | }; |
| 51 | |
| 52 | memory@0 { |
| 53 | device_type = "memory"; |
| 54 | reg = <0x0 0x0 0x0 0x40000000>; |
| 55 | }; |
| 56 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 57 | ao_5v: regulator-ao-5v { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 58 | compatible = "regulator-fixed"; |
| 59 | regulator-name = "AO_5V"; |
| 60 | regulator-min-microvolt = <5000000>; |
| 61 | regulator-max-microvolt = <5000000>; |
| 62 | vin-supply = <&dc_in>; |
| 63 | regulator-always-on; |
| 64 | }; |
| 65 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 66 | dc_in: regulator-dc-in { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 67 | compatible = "regulator-fixed"; |
| 68 | regulator-name = "DC_IN"; |
| 69 | regulator-min-microvolt = <5000000>; |
| 70 | regulator-max-microvolt = <5000000>; |
| 71 | regulator-always-on; |
| 72 | }; |
| 73 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 74 | emmc_1v8: regulator-emmc-1v8 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 75 | compatible = "regulator-fixed"; |
| 76 | regulator-name = "EMMC_1V8"; |
| 77 | regulator-min-microvolt = <1800000>; |
| 78 | regulator-max-microvolt = <1800000>; |
| 79 | vin-supply = <&vddao_3v3>; |
| 80 | regulator-always-on; |
| 81 | }; |
| 82 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 83 | vddao_3v3: regulator-vddao-3v3 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 84 | compatible = "regulator-fixed"; |
| 85 | regulator-name = "VDDAO_3V3"; |
| 86 | regulator-min-microvolt = <3300000>; |
| 87 | regulator-max-microvolt = <3300000>; |
| 88 | vin-supply = <&dc_in>; |
| 89 | regulator-always-on; |
| 90 | }; |
| 91 | |
| 92 | vddcpu: regulator-vddcpu { |
| 93 | compatible = "pwm-regulator"; |
| 94 | |
| 95 | regulator-name = "VDDCPU"; |
| 96 | regulator-min-microvolt = <690000>; |
| 97 | regulator-max-microvolt = <1050000>; |
| 98 | |
| 99 | vin-supply = <&dc_in>; |
| 100 | |
| 101 | pwms = <&pwm_AO_cd 1 1500 0>; |
| 102 | pwm-dutycycle-range = <100 0>; |
| 103 | |
| 104 | regulator-boot-on; |
| 105 | regulator-always-on; |
| 106 | }; |
| 107 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 108 | vddio_ao1v8: regulator-vddio-ao1v8 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 109 | compatible = "regulator-fixed"; |
| 110 | regulator-name = "VDDIO_AO1V8"; |
| 111 | regulator-min-microvolt = <1800000>; |
| 112 | regulator-max-microvolt = <1800000>; |
| 113 | vin-supply = <&vddao_3v3>; |
| 114 | regulator-always-on; |
| 115 | }; |
| 116 | |
| 117 | sdio_pwrseq: sdio-pwrseq { |
| 118 | compatible = "mmc-pwrseq-simple"; |
| 119 | reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; |
| 120 | clocks = <&wifi32k>; |
| 121 | clock-names = "ext_clock"; |
| 122 | }; |
| 123 | |
| 124 | wifi32k: wifi32k { |
| 125 | compatible = "pwm-clock"; |
| 126 | #clock-cells = <0>; |
| 127 | clock-frequency = <32768>; |
| 128 | pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ |
| 129 | }; |
| 130 | }; |
| 131 | |
| 132 | &cec_AO { |
| 133 | pinctrl-0 = <&cec_ao_a_h_pins>; |
| 134 | pinctrl-names = "default"; |
| 135 | status = "disabled"; |
| 136 | hdmi-phandle = <&hdmi_tx>; |
| 137 | }; |
| 138 | |
| 139 | &cecb_AO { |
| 140 | pinctrl-0 = <&cec_ao_b_h_pins>; |
| 141 | pinctrl-names = "default"; |
| 142 | status = "okay"; |
| 143 | hdmi-phandle = <&hdmi_tx>; |
| 144 | }; |
| 145 | |
| 146 | &cpu0 { |
| 147 | cpu-supply = <&vddcpu>; |
| 148 | operating-points-v2 = <&cpu_opp_table>; |
| 149 | clocks = <&clkc CLKID_CPU_CLK>; |
| 150 | clock-latency = <50000>; |
| 151 | }; |
| 152 | |
| 153 | &cpu1 { |
| 154 | cpu-supply = <&vddcpu>; |
| 155 | operating-points-v2 = <&cpu_opp_table>; |
| 156 | clocks = <&clkc CLKID_CPU1_CLK>; |
| 157 | clock-latency = <50000>; |
| 158 | }; |
| 159 | |
| 160 | &cpu2 { |
| 161 | cpu-supply = <&vddcpu>; |
| 162 | operating-points-v2 = <&cpu_opp_table>; |
| 163 | clocks = <&clkc CLKID_CPU2_CLK>; |
| 164 | clock-latency = <50000>; |
| 165 | }; |
| 166 | |
| 167 | &cpu3 { |
| 168 | cpu-supply = <&vddcpu>; |
| 169 | operating-points-v2 = <&cpu_opp_table>; |
| 170 | clocks = <&clkc CLKID_CPU3_CLK>; |
| 171 | clock-latency = <50000>; |
| 172 | }; |
| 173 | |
| 174 | &cvbs_vdac_port { |
| 175 | cvbs_vdac_out: endpoint { |
| 176 | remote-endpoint = <&cvbs_connector_in>; |
| 177 | }; |
| 178 | }; |
| 179 | |
| 180 | &hdmi_tx { |
| 181 | status = "okay"; |
| 182 | pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; |
| 183 | pinctrl-names = "default"; |
| 184 | }; |
| 185 | |
| 186 | &hdmi_tx_tmds_port { |
| 187 | hdmi_tx_tmds_out: endpoint { |
| 188 | remote-endpoint = <&hdmi_connector_in>; |
| 189 | }; |
| 190 | }; |
| 191 | |
| 192 | &ir { |
| 193 | status = "okay"; |
| 194 | pinctrl-0 = <&remote_input_ao_pins>; |
| 195 | pinctrl-names = "default"; |
| 196 | }; |
| 197 | |
| 198 | &pwm_AO_ab { |
| 199 | status = "okay"; |
| 200 | pinctrl-0 = <&pwm_ao_a_pins>; |
| 201 | pinctrl-names = "default"; |
| 202 | clocks = <&xtal>; |
| 203 | clock-names = "clkin0"; |
| 204 | }; |
| 205 | |
| 206 | &pwm_AO_cd { |
| 207 | pinctrl-0 = <&pwm_ao_d_e_pins>; |
| 208 | pinctrl-names = "default"; |
| 209 | clocks = <&xtal>; |
| 210 | clock-names = "clkin1"; |
| 211 | status = "okay"; |
| 212 | }; |
| 213 | |
| 214 | &pwm_ef { |
| 215 | status = "okay"; |
| 216 | pinctrl-0 = <&pwm_e_pins>; |
| 217 | pinctrl-names = "default"; |
| 218 | clocks = <&xtal>; |
| 219 | clock-names = "clkin0"; |
| 220 | }; |
| 221 | |
| 222 | &saradc { |
| 223 | status = "okay"; |
| 224 | vref-supply = <&vddio_ao1v8>; |
| 225 | }; |
| 226 | |
| 227 | /* SDIO */ |
| 228 | &sd_emmc_a { |
| 229 | status = "okay"; |
| 230 | pinctrl-0 = <&sdio_pins>; |
| 231 | pinctrl-1 = <&sdio_clk_gate_pins>; |
| 232 | pinctrl-names = "default", "clk-gate"; |
| 233 | #address-cells = <1>; |
| 234 | #size-cells = <0>; |
| 235 | |
| 236 | bus-width = <4>; |
| 237 | cap-sd-highspeed; |
| 238 | sd-uhs-sdr104; |
| 239 | max-frequency = <200000000>; |
| 240 | |
| 241 | non-removable; |
| 242 | disable-wp; |
| 243 | |
| 244 | /* WiFi firmware requires power to be kept while in suspend */ |
| 245 | keep-power-in-suspend; |
| 246 | |
| 247 | mmc-pwrseq = <&sdio_pwrseq>; |
| 248 | |
| 249 | vmmc-supply = <&vddao_3v3>; |
| 250 | vqmmc-supply = <&vddio_ao1v8>; |
| 251 | }; |
| 252 | |
| 253 | /* SD Card */ |
| 254 | &sd_emmc_b { |
| 255 | status = "okay"; |
| 256 | pinctrl-0 = <&sdcard_c_pins>; |
| 257 | pinctrl-1 = <&sdcard_clk_gate_c_pins>; |
| 258 | pinctrl-names = "default", "clk-gate"; |
| 259 | |
| 260 | bus-width = <4>; |
| 261 | cap-sd-highspeed; |
| 262 | /* CRC errors are observed at 50MHz */ |
| 263 | max-frequency = <35000000>; |
| 264 | disable-wp; |
| 265 | |
| 266 | cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; |
| 267 | vmmc-supply = <&vddao_3v3>; |
| 268 | vqmmc-supply = <&vddao_3v3>; |
| 269 | }; |
| 270 | |
| 271 | /* eMMC */ |
| 272 | &sd_emmc_c { |
| 273 | status = "okay"; |
| 274 | pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; |
| 275 | pinctrl-1 = <&emmc_clk_gate_pins>; |
| 276 | pinctrl-names = "default", "clk-gate"; |
| 277 | |
| 278 | bus-width = <8>; |
| 279 | cap-mmc-highspeed; |
| 280 | mmc-ddr-1_8v; |
| 281 | mmc-hs200-1_8v; |
| 282 | max-frequency = <200000000>; |
| 283 | non-removable; |
| 284 | disable-wp; |
| 285 | |
| 286 | mmc-pwrseq = <&emmc_pwrseq>; |
| 287 | vmmc-supply = <&vddao_3v3>; |
| 288 | vqmmc-supply = <&emmc_1v8>; |
| 289 | }; |
| 290 | |
| 291 | &uart_AO { |
| 292 | status = "okay"; |
| 293 | pinctrl-0 = <&uart_ao_a_pins>; |
| 294 | pinctrl-names = "default"; |
| 295 | }; |
| 296 | |
| 297 | &usb { |
| 298 | status = "okay"; |
| 299 | dr_mode = "otg"; |
| 300 | }; |