| York Sun | 0789dc9 | 2012-12-23 19:25:27 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Freescale Semiconductor, Inc. |
| 3 | * |
| Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
| York Sun | 0789dc9 | 2012-12-23 19:25:27 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __B4860QDS_QIXIS_H__ |
| 8 | #define __B4860QDS_QIXIS_H__ |
| 9 | |
| 10 | /* Definitions of QIXIS Registers for B4860QDS */ |
| 11 | |
| 12 | /* BRDCFG4[4:7]] select EC1 and EC2 as a pair */ |
| 13 | #define BRDCFG4_EMISEL_MASK 0xE0 |
| 14 | #define BRDCFG4_EMISEL_SHIFT 5 |
| 15 | |
| 16 | /* CLK */ |
| 17 | #define QIXIS_CLK_66 0x0 |
| 18 | #define QIXIS_CLK_100 0x1 |
| 19 | #define QIXIS_CLK_125 0x2 |
| 20 | #define QIXIS_CLK_133 0x3 |
| 21 | |
| 22 | #define QIXIS_SRDS1CLK_122 0x5a |
| 23 | #define QIXIS_SRDS1CLK_125 0x5e |
| Zhao Qiang | 1ae9919 | 2013-09-04 10:11:27 +0800 | [diff] [blame] | 24 | |
| 25 | /* SGMII */ |
| 26 | #define PHY_BASE_ADDR 0x18 |
| 27 | #define PORT_NUM 0x04 |
| 28 | #define REGNUM 0x00 |
| York Sun | 0789dc9 | 2012-12-23 19:25:27 +0000 | [diff] [blame] | 29 | #endif |