| wdenk | 7d1eb82 | 2004-09-29 11:02:56 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 4 | * Keith Outwater, keith_outwater@mvis.com. |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | * |
| 24 | */ |
| 25 | |
| 26 | /* |
| 27 | * Virtex2 FPGA configuration support for the QUANTUM computer |
| 28 | */ |
| 29 | int fpga_boot(unsigned char *fpgadata, int size); |
| 30 | |
| 31 | #define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */ |
| 32 | #define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */ |
| 33 | #define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */ |