blob: c1434e7ab2eaaee945590983f5c8d6a36cd097ed [file] [log] [blame]
Dirk Eibach9a13d812010-10-21 10:50:05 +02001/*
2 * (C) Copyright 2010
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef _FPGA_H_
25#define _FPGA_H_
26
27static inline u16 fpga_get_reg(unsigned reg)
28{
29 return in_le16((void *)(CONFIG_SYS_FPGA_BASE + reg));
30}
31
32static inline void fpga_set_reg(unsigned reg, u16 val)
33{
34 return out_le16((void *)(CONFIG_SYS_FPGA_BASE + reg), val);
35}
36
37#endif