blob: bc2f9e70810bd65e9c2b7d83d7c9840e731be0c5 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Masahiro Yamadaa93297e2017-04-14 11:10:22 +09002/*
3 * arch/arm/include/asm/opcodes.h
Masahiro Yamadaa93297e2017-04-14 11:10:22 +09004 */
5
6#ifndef __ASM_ARM_OPCODES_H
7#define __ASM_ARM_OPCODES_H
8
9#ifndef __ASSEMBLY__
10#include <linux/linkage.h>
11extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
12#endif
13
14#define ARM_OPCODE_CONDTEST_FAIL 0
15#define ARM_OPCODE_CONDTEST_PASS 1
16#define ARM_OPCODE_CONDTEST_UNCOND 2
17
Masahiro Yamadaa93297e2017-04-14 11:10:22 +090018/*
19 * Assembler opcode byteswap helpers.
20 * These are only intended for use by this header: don't use them directly,
21 * because they will be suboptimal in most cases.
22 */
23#define ___asm_opcode_swab32(x) ( \
24 (((x) << 24) & 0xFF000000) \
25 | (((x) << 8) & 0x00FF0000) \
26 | (((x) >> 8) & 0x0000FF00) \
27 | (((x) >> 24) & 0x000000FF) \
28)
29#define ___asm_opcode_swab16(x) ( \
30 (((x) << 8) & 0xFF00) \
31 | (((x) >> 8) & 0x00FF) \
32)
33#define ___asm_opcode_swahb32(x) ( \
34 (((x) << 8) & 0xFF00FF00) \
35 | (((x) >> 8) & 0x00FF00FF) \
36)
37#define ___asm_opcode_swahw32(x) ( \
38 (((x) << 16) & 0xFFFF0000) \
39 | (((x) >> 16) & 0x0000FFFF) \
40)
41#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
42#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
43
Masahiro Yamadaa93297e2017-04-14 11:10:22 +090044/*
45 * Opcode byteswap helpers
46 *
47 * These macros help with converting instructions between a canonical integer
48 * format and in-memory representation, in an endianness-agnostic manner.
49 *
50 * __mem_to_opcode_*() convert from in-memory representation to canonical form.
51 * __opcode_to_mem_*() convert from canonical form to in-memory representation.
52 *
53 *
54 * Canonical instruction representation:
55 *
56 * ARM: 0xKKLLMMNN
57 * Thumb 16-bit: 0x0000KKLL, where KK < 0xE8
58 * Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8
59 *
60 * There is no way to distinguish an ARM instruction in canonical representation
61 * from a Thumb instruction (just as these cannot be distinguished in memory).
62 * Where this distinction is important, it needs to be tracked separately.
63 *
64 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
65 * represent any valid Thumb-2 instruction. For this range,
66 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
67 *
68 * The ___asm variants are intended only for use by this header, in situations
69 * involving inline assembler. For .S files, the normal __opcode_*() macros
70 * should do the right thing.
71 */
72#ifdef __ASSEMBLY__
73
74#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
75#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
76#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
77#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
78#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
79#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
80
81#else /* ! __ASSEMBLY__ */
82
83#include <linux/types.h>
84#include <linux/swab.h>
85
86#define ___opcode_swab32(x) swab32(x)
87#define ___opcode_swab16(x) swab16(x)
88#define ___opcode_swahb32(x) swahb32(x)
89#define ___opcode_swahw32(x) swahw32(x)
90#define ___opcode_identity32(x) ((u32)(x))
91#define ___opcode_identity16(x) ((u16)(x))
92
93#endif /* ! __ASSEMBLY__ */
94
Masahiro Yamadaa93297e2017-04-14 11:10:22 +090095#ifdef CONFIG_CPU_ENDIAN_BE8
96
97#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
98#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
99#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
100#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
101#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
102#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
103
104#else /* ! CONFIG_CPU_ENDIAN_BE8 */
105
106#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
107#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
108#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
109#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
110#ifndef CONFIG_CPU_ENDIAN_BE32
111/*
112 * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
113 * work in all cases, due to alignment constraints. For now, a correct
114 * version is not provided for BE32.
115 */
116#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
117#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
118#endif
119
120#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
121
122#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
123#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
124#ifndef CONFIG_CPU_ENDIAN_BE32
125#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
126#endif
127
128/* Operations specific to Thumb opcodes */
129
130/* Instruction size checks: */
131#define __opcode_is_thumb32(x) ( \
132 ((x) & 0xF8000000) == 0xE8000000 \
133 || ((x) & 0xF0000000) == 0xF0000000 \
134)
135#define __opcode_is_thumb16(x) ( \
136 ((x) & 0xFFFF0000) == 0 \
137 && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \
138)
139
140/* Operations to construct or split 32-bit Thumb instructions: */
141#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
142#define __opcode_thumb32_second(x) (___opcode_identity16(x))
143#define __opcode_thumb32_compose(first, second) ( \
144 (___opcode_identity32(___opcode_identity16(first)) << 16) \
145 | ___opcode_identity32(___opcode_identity16(second)) \
146)
147#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
148#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
149#define ___asm_opcode_thumb32_compose(first, second) ( \
150 (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
151 | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \
152)
153
154/*
155 * Opcode injection helpers
156 *
157 * In rare cases it is necessary to assemble an opcode which the
158 * assembler does not support directly, or which would normally be
159 * rejected because of the CFLAGS or AFLAGS used to build the affected
160 * file.
161 *
162 * Before using these macros, consider carefully whether it is feasible
163 * instead to change the build flags for your file, or whether it really
164 * makes sense to support old assembler versions when building that
165 * particular kernel feature.
166 *
167 * The macros defined here should only be used where there is no viable
168 * alternative.
169 *
170 *
171 * __inst_arm(x): emit the specified ARM opcode
172 * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
173 * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
174 *
175 * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
176 * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2
177 * kernel is being built
178 *
179 * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
180 * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2
181 * kernel is being built
182 *
183 *
184 * Note that using these macros directly is poor practice. Instead, you
185 * should use them to define human-readable wrapper macros to encode the
186 * instructions that you care about. In code which might run on ARMv7 or
187 * above, you can usually use the __inst_arm_thumb{16,32} macros to
188 * specify the ARM and Thumb alternatives at the same time. This ensures
189 * that the correct opcode gets emitted depending on the instruction set
190 * used for the kernel build.
191 *
192 * Look at opcodes-virt.h for an example of how to use these macros.
193 */
194#include <linux/stringify.h>
195
196#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
197#define __inst_thumb32(x) ___inst_thumb32( \
198 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \
199 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \
200)
201#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
202
203#ifdef CONFIG_THUMB2_KERNEL
204#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
205 __inst_thumb16(thumb_opcode)
206#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
207 __inst_thumb32(thumb_opcode)
208#else
209#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
210#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
211#endif
212
213/* Helpers for the helpers. Don't use these directly. */
214#ifdef __ASSEMBLY__
215#define ___inst_arm(x) .long x
216#define ___inst_thumb16(x) .short x
217#define ___inst_thumb32(first, second) .short first, second
218#else
219#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
220#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
221#define ___inst_thumb32(first, second) \
222 ".short " __stringify(first) ", " __stringify(second) "\n\t"
223#endif
224
225#endif /* __ASM_ARM_OPCODES_H */