| Andre Przywara | 8780ada | 2023-10-19 15:51:39 +0100 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ |
| Icenowy Zheng | 0c01b96 | 2018-07-21 16:20:31 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> |
| 4 | */ |
| 5 | |
| 6 | #ifndef _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ |
| 7 | #define _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ |
| 8 | |
| 9 | #define RST_R_APB1_TIMER 0 |
| 10 | #define RST_R_APB1_TWD 1 |
| 11 | #define RST_R_APB1_PWM 2 |
| 12 | #define RST_R_APB2_UART 3 |
| 13 | #define RST_R_APB2_I2C 4 |
| 14 | #define RST_R_APB1_IR 5 |
| 15 | #define RST_R_APB1_W1 6 |
| Jernej Skrabec | 415ef9b | 2021-01-11 21:11:50 +0100 | [diff] [blame] | 16 | #define RST_R_APB2_RSB 7 |
| Icenowy Zheng | 0c01b96 | 2018-07-21 16:20:31 +0800 | [diff] [blame] | 17 | |
| 18 | #endif /* _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ */ |