Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 3 | * |
Wolfgang Denk | bd8ec7e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 9 | |
| 10 | /*=======*/ |
| 11 | /* Board */ |
| 12 | /*=======*/ |
| 13 | #define SCHMOOGIE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 14 | #define CONFIG_SYS_NAND_LARGEPAGE |
| 15 | #define CONFIG_SYS_USE_NAND |
Christian Riesch | 034a485 | 2011-11-19 00:45:42 +0000 | [diff] [blame] | 16 | #define MACH_TYPE_SCHMOOGIE 1255 |
| 17 | #define CONFIG_MACH_TYPE MACH_TYPE_SCHMOOGIE |
| 18 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 19 | /*===================*/ |
| 20 | /* SoC Configuration */ |
| 21 | /*===================*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 22 | #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ |
| 23 | #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ |
David Brownell | 5f02add | 2009-05-15 23:44:08 +0200 | [diff] [blame] | 24 | #define CONFIG_SOC_DM644X |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 25 | /*=============*/ |
| 26 | /* Memory Info */ |
| 27 | /*=============*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 28 | #define CONFIG_SYS_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 29 | #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ |
| 30 | #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 31 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 32 | #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ |
| 33 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ |
Wolfgang Denk | a48499f | 2008-04-11 15:11:26 +0200 | [diff] [blame] | 34 | #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 35 | /*====================*/ |
| 36 | /* Serial Driver info */ |
| 37 | /*====================*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 38 | #define CONFIG_SYS_NS16550 |
| 39 | #define CONFIG_SYS_NS16550_SERIAL |
David Brownell | fedd22d | 2009-04-12 15:38:06 -0700 | [diff] [blame] | 40 | #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 41 | #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ |
David Brownell | 1fc5907 | 2009-04-12 15:40:16 -0700 | [diff] [blame] | 42 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 43 | #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ |
| 44 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 45 | /*===================*/ |
| 46 | /* I2C Configuration */ |
| 47 | /*===================*/ |
Vitaly Andrianov | bc9cd95 | 2014-04-04 13:16:52 -0400 | [diff] [blame] | 48 | #define CONFIG_SYS_I2C |
| 49 | #define CONFIG_SYS_I2C_DAVINCI |
| 50 | #define CONFIG_SYS_DAVINCI_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ |
| 51 | #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 52 | /*==================================*/ |
| 53 | /* Network & Ethernet Configuration */ |
| 54 | /*==================================*/ |
| 55 | #define CONFIG_DRIVER_TI_EMAC |
| 56 | #define CONFIG_MII |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 57 | #define CONFIG_BOOTP_DNS |
| 58 | #define CONFIG_BOOTP_DNS2 |
| 59 | #define CONFIG_BOOTP_SEND_HOSTNAME |
| 60 | #define CONFIG_NET_RETRY_COUNT 10 |
| 61 | #define CONFIG_OVERWRITE_ETHADDR_ONCE |
| 62 | /*=====================*/ |
| 63 | /* Flash & Environment */ |
| 64 | /*=====================*/ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 65 | #undef CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 66 | #define CONFIG_SYS_NO_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | f681250 | 2009-03-30 18:58:39 +0200 | [diff] [blame] | 67 | #define CONFIG_NAND_DAVINCI |
Nick Thompson | 789c887 | 2009-12-12 12:12:26 -0500 | [diff] [blame] | 68 | #define CONFIG_SYS_NAND_CS 2 |
Jean-Christophe PLAGNIOL-VILLARD | dda84dd | 2008-09-10 22:47:58 +0200 | [diff] [blame] | 69 | #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 70 | #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ |
Sandeep Paulraj | 391d1a6 | 2009-09-08 17:09:52 -0400 | [diff] [blame] | 71 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 72 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 73 | #define CONFIG_SYS_NAND_BASE 0x02000000 |
| 74 | #define CONFIG_SYS_NAND_HW_ECC |
| 75 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 76 | #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 77 | /*=====================*/ |
| 78 | /* Board related stuff */ |
| 79 | /*=====================*/ |
| 80 | #define CONFIG_RTC_DS1307 /* RTC chip on SCHMOOGIE */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | #define CONFIG_SYS_I2C_RTC_ADDR 0x6f /* RTC chip I2C address */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 82 | #define CONFIG_UID_DS28CM00 /* Unique ID on SCHMOOGIE */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 83 | #define CONFIG_SYS_UID_ADDR 0x50 /* UID chip I2C address */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 84 | /*==============================*/ |
| 85 | /* U-Boot general configuration */ |
| 86 | /*==============================*/ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 87 | #define CONFIG_MISC_INIT_R |
| 88 | #undef CONFIG_BOOTDELAY |
| 89 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 90 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 91 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */ |
| 92 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 93 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| 94 | #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 95 | #define CONFIG_VERSION_VARIABLE |
| 96 | #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 97 | #define CONFIG_SYS_HUSH_PARSER |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 98 | #define CONFIG_CMDLINE_EDITING |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #define CONFIG_SYS_LONGHELP |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 100 | #define CONFIG_CRC32_VERIFY |
| 101 | #define CONFIG_MX_CYCLIC |
| 102 | /*===================*/ |
| 103 | /* Linux Information */ |
| 104 | /*===================*/ |
| 105 | #define LINUX_BOOT_PARAM_ADDR 0x80000100 |
| 106 | #define CONFIG_CMDLINE_TAG |
| 107 | #define CONFIG_SETUP_MEMORY_TAGS |
| 108 | #define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" |
| 109 | #define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" |
| 110 | /*=================*/ |
| 111 | /* U-Boot commands */ |
| 112 | /*=================*/ |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 113 | #define CONFIG_CMD_ASKENV |
| 114 | #define CONFIG_CMD_DHCP |
| 115 | #define CONFIG_CMD_DIAG |
| 116 | #define CONFIG_CMD_I2C |
| 117 | #define CONFIG_CMD_MII |
| 118 | #define CONFIG_CMD_PING |
| 119 | #define CONFIG_CMD_SAVES |
| 120 | #define CONFIG_CMD_DATE |
| 121 | #define CONFIG_CMD_NAND |
| 122 | #undef CONFIG_CMD_EEPROM |
Sandeep Paulraj | ada0a22 | 2010-12-11 20:38:35 -0500 | [diff] [blame] | 123 | |
Hadli, Manjunath | 0dfccbe | 2012-02-06 00:30:44 +0000 | [diff] [blame] | 124 | #ifdef CONFIG_CMD_BDI |
| 125 | #define CONFIG_CLOCKS |
| 126 | #endif |
| 127 | |
Sandeep Paulraj | ada0a22 | 2010-12-11 20:38:35 -0500 | [diff] [blame] | 128 | #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ |
| 129 | |
| 130 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 131 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 |
| 132 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
| 133 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 134 | GENERATED_GBL_DATA_SIZE) |
| 135 | |
Sergey Kubushyn | e8f3912 | 2007-08-10 20:26:18 +0200 | [diff] [blame] | 136 | #endif /* __CONFIG_H */ |