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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Wolfgang Denk, DENX Software Engineering -- wd@denx.de
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/************************************************************************/
25/* ** DEBUG SETTINGS */
26/************************************************************************/
27
28/* #define DEBUG */
29
30/************************************************************************/
31/* ** HEADER FILES */
32/************************************************************************/
33
34#include <config.h>
35#include <common.h>
36#include <version.h>
37#include <stdarg.h>
38#include <linux/types.h>
39#include <devices.h>
40#include <s3c2400.h>
41
42#ifdef CONFIG_VFD
43
44/************************************************************************/
45/* ** CONFIG STUFF -- should be moved to board config file */
46/************************************************************************/
47
48/************************************************************************/
49
50#ifndef PAGE_SIZE
51#define PAGE_SIZE 4096
52#endif
53
54#define ROT 0x09
55#define BLAU 0x0C
56#define VIOLETT 0X0D
57
wdenkef5fe752003-03-12 10:41:04 +000058/* MAGIC */
59#define FRAME_BUF_SIZE ((256*4*56)/8)
wdenkc6097192002-11-03 00:24:07 +000060#define frame_buf_offs 4
61
wdenk6b58f332003-03-14 20:47:52 +000062/* defines for starting Timer3 as CPLD-Clk */
63#define START3 (1 << 16)
64#define UPDATE3 (1 << 17)
65#define INVERT3 (1 << 18)
66#define RELOAD3 (1 << 19)
67
68/* CPLD-Register for controlling vfd-blank-signal */
69#define VFD_DISABLE (*(volatile uchar *)0x04038000=0x0000)
70#define VFD_ENABLE (*(volatile uchar *)0x04038000=0x0001)
71
wdenk4fc95692003-02-28 00:49:47 +000072/* Supported VFD Types */
73#define VFD_TYPE_T119C 1 /* Noritake T119C VFD */
74#define VFD_TYPE_MN11236 2
75
wdenk6b58f332003-03-14 20:47:52 +000076/*#define NEW_CPLD_CLK*/
77
78int vfd_board_id;
79
wdenkc6097192002-11-03 00:24:07 +000080/* taken from armboot/common/vfd.c */
wdenk4fc95692003-02-28 00:49:47 +000081unsigned long adr_vfd_table[112][18][2][4][2];
wdenkc6097192002-11-03 00:24:07 +000082unsigned char bit_vfd_table[112][18][2][4][2];
83
84/*
85 * initialize the values for the VFD-grid-control in the framebuffer
86 */
87void init_grid_ctrl(void)
88{
wdenk4fc95692003-02-28 00:49:47 +000089 DECLARE_GLOBAL_DATA_PTR;
wdenkc6097192002-11-03 00:24:07 +000090 ulong adr, grid_cycle;
91 unsigned int bit, display;
92 unsigned char temp, bit_nr;
93
wdenk4fc95692003-02-28 00:49:47 +000094 /*
95 * clear frame buffer (logical clear => set to "black")
96 */
wdenk6b58f332003-03-14 20:47:52 +000097 memset ((void *)(gd->fb_base), 0, FRAME_BUF_SIZE);
wdenk4fc95692003-02-28 00:49:47 +000098
99 switch (gd->vfd_type) {
100 case VFD_TYPE_T119C:
101 for (display=0; display<4; display++) {
102 for(grid_cycle=0; grid_cycle<56; grid_cycle++) {
103 bit = grid_cycle * 256 * 4 +
104 (grid_cycle + 200) * 4 +
105 frame_buf_offs + display;
wdenkc6097192002-11-03 00:24:07 +0000106 /* wrap arround if offset (see manual S3C2400) */
wdenkef5fe752003-03-12 10:41:04 +0000107 if (bit>=FRAME_BUF_SIZE*8)
108 bit = bit - (FRAME_BUF_SIZE * 8);
wdenk1fe2c702003-03-06 21:55:29 +0000109 adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
wdenk4fc95692003-02-28 00:49:47 +0000110 bit_nr = bit % 8;
111 bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
wdenkc6097192002-11-03 00:24:07 +0000112 temp=(*(volatile unsigned char*)(adr));
wdenk6b58f332003-03-14 20:47:52 +0000113 temp |= (1<<bit_nr);
wdenkc6097192002-11-03 00:24:07 +0000114 (*(volatile unsigned char*)(adr))=temp;
115
116 if(grid_cycle<55)
117 bit = grid_cycle*256*4+(grid_cycle+201)*4+frame_buf_offs+display;
118 else
119 bit = grid_cycle*256*4+200*4+frame_buf_offs+display-4; /* grid nr. 0 */
120 /* wrap arround if offset (see manual S3C2400) */
wdenkef5fe752003-03-12 10:41:04 +0000121 if (bit>=FRAME_BUF_SIZE*8)
122 bit = bit-(FRAME_BUF_SIZE*8);
wdenk1fe2c702003-03-06 21:55:29 +0000123 adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
wdenk4fc95692003-02-28 00:49:47 +0000124 bit_nr = bit%8;
125 bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
126 temp=(*(volatile unsigned char*)(adr));
wdenk6b58f332003-03-14 20:47:52 +0000127 temp |= (1<<bit_nr);
wdenk4fc95692003-02-28 00:49:47 +0000128 (*(volatile unsigned char*)(adr))=temp;
129 }
130 }
131 break;
132 case VFD_TYPE_MN11236:
133 for (display=0; display<4; display++) {
134 for (grid_cycle=0; grid_cycle<38; grid_cycle++) {
135 bit = grid_cycle * 256 * 4 +
136 (253 - grid_cycle) * 4 +
137 frame_buf_offs + display;
138 /* wrap arround if offset (see manual S3C2400) */
wdenkef5fe752003-03-12 10:41:04 +0000139 if (bit>=FRAME_BUF_SIZE*8)
140 bit = bit - (FRAME_BUF_SIZE * 8);
wdenk1fe2c702003-03-06 21:55:29 +0000141 adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
wdenk4fc95692003-02-28 00:49:47 +0000142 bit_nr = bit % 8;
143 bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
144 temp=(*(volatile unsigned char*)(adr));
wdenk6b58f332003-03-14 20:47:52 +0000145 temp |= (1<<bit_nr);
wdenk4fc95692003-02-28 00:49:47 +0000146 (*(volatile unsigned char*)(adr))=temp;
147
148 if(grid_cycle<37)
149 bit = grid_cycle*256*4+(252-grid_cycle)*4+frame_buf_offs+display;
150
151 /* wrap arround if offset (see manual S3C2400) */
wdenkef5fe752003-03-12 10:41:04 +0000152 if (bit>=FRAME_BUF_SIZE*8)
153 bit = bit-(FRAME_BUF_SIZE*8);
wdenk1fe2c702003-03-06 21:55:29 +0000154 adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
wdenkc6097192002-11-03 00:24:07 +0000155 bit_nr = bit%8;
156 bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
157 temp=(*(volatile unsigned char*)(adr));
wdenk6b58f332003-03-14 20:47:52 +0000158 temp |= (1<<bit_nr);
wdenkc6097192002-11-03 00:24:07 +0000159 (*(volatile unsigned char*)(adr))=temp;
160 }
wdenk4fc95692003-02-28 00:49:47 +0000161 }
162 break;
163 default:
164 printf ("Warning: unknown display type\n");
165 break;
wdenkc6097192002-11-03 00:24:07 +0000166 }
167}
168
169/*
170 *create translation table for getting easy the right position in the
171 *physical framebuffer for some x/y-coordinates of the VFDs
172 */
173void create_vfd_table(void)
174{
wdenk4fc95692003-02-28 00:49:47 +0000175 DECLARE_GLOBAL_DATA_PTR;
176 unsigned long vfd_table[112][18][2][4][2];
177 unsigned int x, y, color, display, entry, pixel;
178 unsigned int x_abcdef = 0;
wdenkc6097192002-11-03 00:24:07 +0000179
wdenk4fc95692003-02-28 00:49:47 +0000180 switch (gd->vfd_type) {
181 case VFD_TYPE_T119C:
182 for(y=0; y<=17; y++) { /* Line */
183 for(x=0; x<=111; x++) { /* Column */
184 for(display=0; display <=3; display++) {
185
186 /* Display 0 blue pixels */
187 vfd_table[x][y][0][display][0] =
188 (x==0) ? y*16+display
189 : (x%4)*4+y*16+((x-1)/2)*1024+display;
190 /* Display 0 red pixels */
191 vfd_table[x][y][1][display][0] =
192 (x==0) ? y*16+512+display
193 : (x%4)*4+y*16+((x-1)/2)*1024+512+display;
194 }
195 }
196 }
197 break;
198 case VFD_TYPE_MN11236:
199 for(y=0; y<=17; y++) { /* Line */
200 for(x=0; x<=111; x++) { /* Column */
201 for(display=0; display <=3; display++) {
202
203 vfd_table[x][y][0][display][0]=0;
204 vfd_table[x][y][0][display][1]=0;
205 vfd_table[x][y][1][display][0]=0;
206 vfd_table[x][y][1][display][1]=0;
207
208 switch (x%6) {
209 case 0: x_abcdef=0; break; /* a -> a */
210 case 1: x_abcdef=2; break; /* b -> c */
211 case 2: x_abcdef=4; break; /* c -> e */
212 case 3: x_abcdef=5; break; /* d -> f */
213 case 4: x_abcdef=3; break; /* e -> d */
214 case 5: x_abcdef=1; break; /* f -> b */
215 }
216
217 /* blue pixels */
218 vfd_table[x][y][0][display][0] =
219 (x>1) ? x_abcdef*4+((x-1)/3)*1024+y*48+display
220 : x_abcdef*4+ 0+y*48+display;
221 /* blue pixels */
222 if (x>1 && (x-1)%3)
223 vfd_table[x][y][0][display][1] = x_abcdef*4+((x-1)/3+1)*1024+y*48+display;
224
225 /* red pixels */
226 vfd_table[x][y][1][display][0] =
227 (x>1) ? x_abcdef*4+24+((x-1)/3)*1024+y*48+display
228 : x_abcdef*4+24+ 0+y*48+display;
229 /* red pixels */
230 if (x>1 && (x-1)%3)
231 vfd_table[x][y][1][display][1] = x_abcdef*4+24+((x-1)/3+1)*1024+y*48+display;
232 }
wdenkc6097192002-11-03 00:24:07 +0000233 }
wdenk4fc95692003-02-28 00:49:47 +0000234 }
235 break;
236 default:
237 /* do nothing */
238 return;
wdenkc6097192002-11-03 00:24:07 +0000239 }
240
241 /*
wdenkc6097192002-11-03 00:24:07 +0000242 * Create table with entries for physical byte adresses and
243 * bit-number within the byte
244 * from table with bit-numbers within the total framebuffer
245 */
wdenk4fc95692003-02-28 00:49:47 +0000246 for(y=0;y<18;y++) {
247 for(x=0;x<112;x++) {
248 for(color=0;color<2;color++) {
249 for(display=0;display<4;display++) {
250 for(entry=0;entry<2;entry++) {
wdenk1fe2c702003-03-06 21:55:29 +0000251 unsigned long adr = gd->fb_base;
wdenk4fc95692003-02-28 00:49:47 +0000252 unsigned int bit_nr = 0;
wdenk6b58f332003-03-14 20:47:52 +0000253
wdenk4fc95692003-02-28 00:49:47 +0000254 if (vfd_table[x][y][color][display][entry]) {
255
256 pixel = vfd_table[x][y][color][display][entry] + frame_buf_offs;
257 /*
258 * wrap arround if offset
259 * (see manual S3C2400)
260 */
wdenkef5fe752003-03-12 10:41:04 +0000261 if (pixel>=FRAME_BUF_SIZE*8)
262 pixel = pixel-(FRAME_BUF_SIZE*8);
wdenk1fe2c702003-03-06 21:55:29 +0000263 adr = gd->fb_base+(pixel/32)*4+(3-(pixel%32)/8);
wdenk4fc95692003-02-28 00:49:47 +0000264 bit_nr = pixel%8;
265 bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
266 }
267 adr_vfd_table[x][y][color][display][entry] = adr;
268 bit_vfd_table[x][y][color][display][entry] = bit_nr;
wdenkc6097192002-11-03 00:24:07 +0000269 }
wdenk4fc95692003-02-28 00:49:47 +0000270 }
wdenkc6097192002-11-03 00:24:07 +0000271 }
wdenk4fc95692003-02-28 00:49:47 +0000272 }
wdenkc6097192002-11-03 00:24:07 +0000273 }
274}
275
276/*
277 * Set/clear pixel of the VFDs
278 */
wdenk4fc95692003-02-28 00:49:47 +0000279void set_vfd_pixel(unsigned char x, unsigned char y,
280 unsigned char color, unsigned char display,
281 unsigned char value)
wdenkc6097192002-11-03 00:24:07 +0000282{
wdenk4fc95692003-02-28 00:49:47 +0000283 DECLARE_GLOBAL_DATA_PTR;
wdenkc6097192002-11-03 00:24:07 +0000284 ulong adr;
285 unsigned char bit_nr, temp;
286
wdenk4fc95692003-02-28 00:49:47 +0000287 if (! gd->vfd_type) {
288 /* Unknown type. */
289 return;
wdenkc6097192002-11-03 00:24:07 +0000290 }
wdenk4fc95692003-02-28 00:49:47 +0000291
292 /* Pixel-Eintrag Nr. 1 */
293 adr = adr_vfd_table[x][y][color][display][0];
294 /* Pixel-Eintrag Nr. 1 */
295 bit_nr = bit_vfd_table[x][y][color][display][0];
296 temp=(*(volatile unsigned char*)(adr));
wdenkc6097192002-11-03 00:24:07 +0000297
wdenk6b58f332003-03-14 20:47:52 +0000298 if (value)
299 temp |= (1<<bit_nr);
300 else
301 temp &= ~(1<<bit_nr);
302
wdenk4fc95692003-02-28 00:49:47 +0000303 (*(volatile unsigned char*)(adr))=temp;
wdenkc6097192002-11-03 00:24:07 +0000304}
305
306/*
307 * transfer image from BMP-File
308 */
309void transfer_pic(int display, unsigned char *adr, int height, int width)
310{
311 int x, y;
312 unsigned char temp;
313
314 for (; height > 0; height -= 18)
315 {
316 if (height > 18)
317 y = 18;
318 else
319 y = height;
320 for (; y > 0; y--)
321 {
322 for (x = 0; x < width; x += 2)
323 {
324 temp = *adr++;
325 set_vfd_pixel(x, y-1, 0, display, 0);
326 set_vfd_pixel(x, y-1, 1, display, 0);
327 if ((temp >> 4) == BLAU)
328 set_vfd_pixel(x, y-1, 0, display, 1);
329 else if ((temp >> 4) == ROT)
330 set_vfd_pixel(x, y-1, 1, display, 1);
331 else if ((temp >> 4) == VIOLETT)
332 {
333 set_vfd_pixel(x, y-1, 0, display, 1);
334 set_vfd_pixel(x, y-1, 1, display, 1);
335 }
336 set_vfd_pixel(x+1, y-1, 0, display, 0);
337 set_vfd_pixel(x+1, y-1, 1, display, 0);
338 if ((temp & 0x0F) == BLAU)
339 set_vfd_pixel(x+1, y-1, 0, display, 1);
340 else if ((temp & 0x0F) == ROT)
341 set_vfd_pixel(x+1, y-1, 1, display, 1);
342 else if ((temp & 0x0F) == VIOLETT)
343 {
344 set_vfd_pixel(x+1, y-1, 0, display, 1);
345 set_vfd_pixel(x+1, y-1, 1, display, 1);
346 }
347 }
348 }
wdenk6bd7b5d2003-05-21 20:26:20 +0000349 if (display > 0)
350 display--;
351 else
352 display = 3;
wdenkc6097192002-11-03 00:24:07 +0000353 }
354}
355
356/*
wdenk4fc95692003-02-28 00:49:47 +0000357 * This function initializes VFD clock that is needed for the CPLD that
358 * manages the keyboard.
359 */
wdenk6b58f332003-03-14 20:47:52 +0000360int vfd_init_clocks (void)
wdenk4fc95692003-02-28 00:49:47 +0000361{
wdenk7539dea2003-06-19 23:01:32 +0000362 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
363 S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
364 S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
wdenk4fc95692003-02-28 00:49:47 +0000365
wdenk6b58f332003-03-14 20:47:52 +0000366 /* try to determine display type from the value
367 * defined by pull-ups
368 */
wdenk7539dea2003-06-19 23:01:32 +0000369 gpio->PCUP = (gpio->PCUP & 0xFFF0); /* activate GPC0...GPC3 pullups */
370 gpio->PCCON = (gpio->PCCON & 0xFFFFFF00); /* configure GPC0...GPC3 as inputs */
wdenk6b58f332003-03-14 20:47:52 +0000371 udelay (10); /* allow signals to settle */
wdenk7539dea2003-06-19 23:01:32 +0000372 vfd_board_id = (~gpio->PCDAT) & 0x000F; /* read GPC0...GPC3 port pins */
wdenk6b58f332003-03-14 20:47:52 +0000373
374 VFD_DISABLE; /* activate blank for the vfd */
375
376#define NEW_CPLD_CLK
377
378#ifdef NEW_CPLD_CLK
379 if (vfd_board_id) {
380 /* If new board revision, then use PWM 3 as cpld-clock */
381 /* Enable 500 Hz timer for fill level sensor to operate properly */
382 /* Configure TOUT3 as functional pin, disable pull-up */
wdenk7539dea2003-06-19 23:01:32 +0000383 gpio->PDCON &= ~0x30000;
384 gpio->PDCON |= 0x20000;
385 gpio->PDUP |= (1 << 8);
wdenk6b58f332003-03-14 20:47:52 +0000386
387 /* Configure the prescaler */
wdenk7539dea2003-06-19 23:01:32 +0000388 timers->TCFG0 &= ~0xff00;
389 timers->TCFG0 |= 0x0f00;
wdenk6b58f332003-03-14 20:47:52 +0000390
391 /* Select MUX input (divider) for timer3 (1/16) */
wdenk7539dea2003-06-19 23:01:32 +0000392 timers->TCFG1 &= ~0xf000;
393 timers->TCFG1 |= 0x3000;
wdenk6b58f332003-03-14 20:47:52 +0000394
395 /* Enable autoreload and set the counter and compare
396 * registers to values for the 500 Hz clock
397 * (for a given prescaler (15) and divider (16)):
398 * counter = (66000000 / 500) >> 9;
399 */
wdenk7539dea2003-06-19 23:01:32 +0000400 timers->ch[3].TCNTB = 0x101;
401 timers->ch[3].TCMPB = 0x101 / 2;
wdenk6b58f332003-03-14 20:47:52 +0000402
403 /* Start timer */
wdenk7539dea2003-06-19 23:01:32 +0000404 timers->TCON = (timers->TCON | UPDATE3 | RELOAD3) & ~INVERT3;
405 timers->TCON = (timers->TCON | START3) & ~UPDATE3;
wdenk6b58f332003-03-14 20:47:52 +0000406 }
407#endif
408 /* If old board revision, then use vm-signal as cpld-clock */
wdenk7539dea2003-06-19 23:01:32 +0000409 lcd->LCDCON2 = 0x00FFC000;
410 lcd->LCDCON3 = 0x0007FF00;
411 lcd->LCDCON4 = 0x00000000;
412 lcd->LCDCON5 = 0x00000400;
413 lcd->LCDCON1 = 0x00000B75;
wdenk6b58f332003-03-14 20:47:52 +0000414 /* VM (GPD1) is used as clock for the CPLD */
wdenk7539dea2003-06-19 23:01:32 +0000415 gpio->PDCON = (gpio->PDCON & 0xFFFFFFF3) | 0x00000008;
wdenk1fe2c702003-03-06 21:55:29 +0000416
417 return 0;
wdenk4fc95692003-02-28 00:49:47 +0000418}
419
420/*
wdenkc6097192002-11-03 00:24:07 +0000421 * initialize LCD-Controller of the S3C2400 for using VFDs
wdenk1fe2c702003-03-06 21:55:29 +0000422 *
423 * VFD detection depends on the board revision:
424 * starting from Rev. 200 a type code can be read from the data pins,
425 * driven by some pull-up resistors; all earlier systems must be
426 * manually configured. The type is set in the "vfd_type" environment
427 * variable.
wdenkc6097192002-11-03 00:24:07 +0000428 */
429int drv_vfd_init(void)
430{
wdenk7539dea2003-06-19 23:01:32 +0000431 S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
432 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
wdenk4fc95692003-02-28 00:49:47 +0000433 char *tmp;
wdenkc6097192002-11-03 00:24:07 +0000434 ulong palette;
wdenk9dd2b882002-12-03 21:28:10 +0000435 static int vfd_init_done = 0;
wdenk6b58f332003-03-14 20:47:52 +0000436 int vfd_inv_data = 0;
wdenkc6097192002-11-03 00:24:07 +0000437
438 DECLARE_GLOBAL_DATA_PTR;
439
wdenk9dd2b882002-12-03 21:28:10 +0000440 if (vfd_init_done != 0)
wdenkbb444c92002-12-07 00:20:59 +0000441 return (0);
wdenk9dd2b882002-12-03 21:28:10 +0000442 vfd_init_done = 1;
443
wdenk6b58f332003-03-14 20:47:52 +0000444 debug("Detecting Revison of WA4-VFD: ID=0x%X\n", vfd_board_id);
wdenk4fc95692003-02-28 00:49:47 +0000445
wdenk6b58f332003-03-14 20:47:52 +0000446 switch (vfd_board_id) {
wdenk1fe2c702003-03-06 21:55:29 +0000447 case 0: /* board revision < Rev.200 */
wdenk4fc95692003-02-28 00:49:47 +0000448 if ((tmp = getenv ("vfd_type")) == NULL) {
449 break;
450 }
451 if (strcmp(tmp, "T119C") == 0) {
452 gd->vfd_type = VFD_TYPE_T119C;
453 } else if (strcmp(tmp, "MN11236") == 0) {
454 gd->vfd_type = VFD_TYPE_MN11236;
455 } else {
456 /* cannot use printf for a warning here */
457 gd->vfd_type = 0; /* unknown */
458 }
wdenk4fc95692003-02-28 00:49:47 +0000459
460 break;
wdenk1fe2c702003-03-06 21:55:29 +0000461 default: /* default to MN11236, data inverted */
wdenk4fc95692003-02-28 00:49:47 +0000462 gd->vfd_type = VFD_TYPE_MN11236;
wdenk6b58f332003-03-14 20:47:52 +0000463 vfd_inv_data = 1;
wdenk4fc95692003-02-28 00:49:47 +0000464 setenv ("vfd_type", "MN11236");
465 }
466 debug ("VFD type: %s%s\n",
467 (gd->vfd_type == VFD_TYPE_T119C) ? "T119C" :
468 (gd->vfd_type == VFD_TYPE_MN11236) ? "MN11236" :
469 "unknown",
wdenk6b58f332003-03-14 20:47:52 +0000470 vfd_inv_data ? ", inverted data" : "");
wdenk4fc95692003-02-28 00:49:47 +0000471
wdenk1fe2c702003-03-06 21:55:29 +0000472 gd->fb_base = gd->fb_base;
wdenkc6097192002-11-03 00:24:07 +0000473 create_vfd_table();
474 init_grid_ctrl();
475
wdenk4fc95692003-02-28 00:49:47 +0000476 for (palette=0; palette < 16; palette++)
477 (*(volatile unsigned int*)(PALETTE+(palette*4)))=palette;
478 for (palette=16; palette < 256; palette++)
479 (*(volatile unsigned int*)(PALETTE+(palette*4)))=0x00;
480
wdenkc6097192002-11-03 00:24:07 +0000481 /*
482 * Hinweis: Der Framebuffer ist um genau ein Nibble verschoben
483 * Das erste angezeigte Pixel wird aus dem zweiten Nibble geholt
484 * das letzte angezeigte Pixel wird aus dem ersten Nibble geholt
485 * (wrap around)
486 * see manual S3C2400
487 */
wdenk6b58f332003-03-14 20:47:52 +0000488 /* Stopp LCD-Controller */
wdenk7539dea2003-06-19 23:01:32 +0000489 lcd->LCDCON1 = 0x00000000;
wdenkc6097192002-11-03 00:24:07 +0000490 /* frame buffer startadr */
wdenk7539dea2003-06-19 23:01:32 +0000491 lcd->LCDSADDR1 = gd->fb_base >> 1;
wdenkc6097192002-11-03 00:24:07 +0000492 /* frame buffer endadr */
wdenk7539dea2003-06-19 23:01:32 +0000493 lcd->LCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
494 lcd->LCDSADDR3 = ((256/4));
495 lcd->LCDCON2 = 0x000DC000;
wdenk3f9ab982003-04-12 23:38:12 +0000496 if(gd->vfd_type == VFD_TYPE_MN11236)
wdenk7539dea2003-06-19 23:01:32 +0000497 lcd->LCDCON2 = 37 << 14; /* MN11236: 38 lines */
wdenk3f9ab982003-04-12 23:38:12 +0000498 else
wdenk7539dea2003-06-19 23:01:32 +0000499 lcd->LCDCON2 = 55 << 14; /* T119C: 56 lines */
500 lcd->LCDCON3 = 0x0051000A;
501 lcd->LCDCON4 = 0x00000001;
wdenk6b58f332003-03-14 20:47:52 +0000502 if (gd->vfd_type && vfd_inv_data)
wdenk7539dea2003-06-19 23:01:32 +0000503 lcd->LCDCON5 = 0x000004C0;
wdenk6b58f332003-03-14 20:47:52 +0000504 else
wdenk7539dea2003-06-19 23:01:32 +0000505 lcd->LCDCON5 = 0x00000440;
wdenk6b58f332003-03-14 20:47:52 +0000506
507 /* Port pins as LCD output */
wdenk7539dea2003-06-19 23:01:32 +0000508 gpio->PCCON = (gpio->PCCON & 0xFFFFFF00)| 0x000000AA;
509 gpio->PDCON = (gpio->PDCON & 0xFFFFFF03)| 0x000000A8;
wdenk6b58f332003-03-14 20:47:52 +0000510
511 /* Synchronize VFD enable with LCD controller to avoid flicker */
wdenk7539dea2003-06-19 23:01:32 +0000512 lcd->LCDCON1 = 0x00000B75; /* Start LCD-Controller */
513 while((lcd->LCDCON5 & 0x180000)!=0x100000); /* Wait for end of VSYNC */
514 while((lcd->LCDCON5 & 0x060000)!=0x040000); /* Wait for next HSYNC */
515 while((lcd->LCDCON5 & 0x060000)==0x040000);
516 while((lcd->LCDCON5 & 0x060000)!=0x000000);
wdenk6b58f332003-03-14 20:47:52 +0000517 if(gd->vfd_type)
518 VFD_ENABLE;
wdenkc6097192002-11-03 00:24:07 +0000519
wdenk7539dea2003-06-19 23:01:32 +0000520 debug ("LCDSADDR1: %lX\n", lcd->LCDSADDR1);
521 debug ("LCDSADDR2: %lX\n", lcd->LCDSADDR2);
522 debug ("LCDSADDR3: %lX\n", lcd->LCDSADDR3);
wdenkc6097192002-11-03 00:24:07 +0000523
wdenkc6097192002-11-03 00:24:07 +0000524 return 0;
525}
526
wdenk6b58f332003-03-14 20:47:52 +0000527/*
528 * Disable VFD: should be run before resetting the system:
529 * disable VM, enable pull-up
530 */
531void disable_vfd (void)
532{
wdenk7539dea2003-06-19 23:01:32 +0000533 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
534
wdenk6b58f332003-03-14 20:47:52 +0000535 VFD_DISABLE;
wdenk7539dea2003-06-19 23:01:32 +0000536 gpio->PDCON &= ~0xC;
537 gpio->PDUP &= ~0x2;
wdenk6b58f332003-03-14 20:47:52 +0000538}
539
wdenkc6097192002-11-03 00:24:07 +0000540/************************************************************************/
541/* ** ROM capable initialization part - needed to reserve FB memory */
542/************************************************************************/
543
544/*
545 * This is called early in the system initialization to grab memory
546 * for the VFD controller.
547 *
548 * Note that this is running from ROM, so no write access to global data.
549 */
550ulong vfd_setmem (ulong addr)
551{
552 ulong size;
553
wdenkc6097192002-11-03 00:24:07 +0000554 /* Round up to nearest full page */
wdenkef5fe752003-03-12 10:41:04 +0000555 size = (FRAME_BUF_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
wdenkc6097192002-11-03 00:24:07 +0000556
557 debug ("Reserving %ldk for VFD Framebuffer at: %08lx\n", size>>10, addr);
558
559 return (size);
560}
561
562#endif /* CONFIG_VFD */