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wdenkaffae2b2002-08-17 09:36:01 +00001/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Modified 4/5/2001
26 * Wait for completion of each sector erase command issued
27 * 4/5/2001
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
29 */
30
31/*
32 * Modified 3/7/2001
wdenk7d076412003-05-23 11:38:58 +000033 * - adapted for pip405, Denis Peter, MPL AG Switzerland
wdenkaffae2b2002-08-17 09:36:01 +000034 * TODO:
35 * clean-up
36 */
37
38#include <common.h>
39#include <ppc4xx.h>
40#include <asm/processor.h>
wdenkaffae2b2002-08-17 09:36:01 +000041#include "common_util.h"
42
43flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
44/*-----------------------------------------------------------------------
45 * Functions
46 */
47static ulong flash_get_size (vu_long *addr, flash_info_t *info);
48static int write_word (flash_info_t *info, ulong dest, ulong data);
wdenkaffae2b2002-08-17 09:36:01 +000049
50void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
51
52
wdenkaffae2b2002-08-17 09:36:01 +000053#ifdef CONFIG_PIP405
54#define ADDR0 0x5555
55#define ADDR1 0x2aaa
56#define FLASH_WORD_SIZE unsigned short
57#endif
58
59#ifdef CONFIG_MIP405
60#define ADDR0 0x5555
61#define ADDR1 0x2aaa
62#define FLASH_WORD_SIZE unsigned short
63#endif
64
65#define FALSE 0
66#define TRUE 1
67
68/*-----------------------------------------------------------------------
69 */
70
71
72unsigned long flash_init (void)
73{
74 unsigned long size_b0, size_b1;
75 int i;
wdenkaffae2b2002-08-17 09:36:01 +000076
wdenk7d076412003-05-23 11:38:58 +000077 /* Since we are relocated, we can set-up the CS finally */
78 setup_cs_reloc();
79 /* get and display boot mode */
80 i=get_boot_mode();
81 if(i & BOOT_PCI)
82 printf("(PCI Boot %s Map) ",(i & BOOT_MPS) ?
83 "MPS" : "Flash");
wdenkaffae2b2002-08-17 09:36:01 +000084 else
wdenk7d076412003-05-23 11:38:58 +000085 printf("(%s Boot) ",(i & BOOT_MPS) ?
86 "MPS" : "Flash");
wdenkaffae2b2002-08-17 09:36:01 +000087 /* Init: no FLASHes known */
88 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
89 flash_info[i].flash_id = FLASH_UNKNOWN;
90 }
91
92 /* Static FLASH Bank configuration here - FIXME XXX */
93
94 size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
95
96 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
97 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
98 size_b0, size_b0<<20);
99 }
wdenk7d076412003-05-23 11:38:58 +0000100 /* protect the bootloader */
101 /* Monitor protection ON by default */
wdenkaffae2b2002-08-17 09:36:01 +0000102#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
wdenk7d076412003-05-23 11:38:58 +0000103 flash_protect(FLAG_PROTECT_SET,
104 CFG_MONITOR_BASE,
wdenkb9a83a92003-05-30 12:48:29 +0000105 CFG_MONITOR_BASE+monitor_flash_len-1,
wdenk7d076412003-05-23 11:38:58 +0000106 &flash_info[0]);
wdenkaffae2b2002-08-17 09:36:01 +0000107#endif
wdenk874ac262003-07-24 23:38:38 +0000108 /* protect reset vector */
109 flash_info[0].protect[flash_info[0].sector_count-1] = 1;
wdenk7d076412003-05-23 11:38:58 +0000110 size_b1 = 0 ;
111 flash_info[0].size = size_b0;
wdenkaffae2b2002-08-17 09:36:01 +0000112#if 0
wdenk7d076412003-05-23 11:38:58 +0000113 /* include this if you want to test if
114 the relocation has be done ok.
115 This will disable both Chipselects */
116 mtdcr (ebccfga, pb0cr);
117 mtdcr (ebccfgd, 0L);
118 mtdcr (ebccfga, pb1cr);
119 mtdcr (ebccfgd, 0L);
120 printf("CS0 & CS1 switched off for test\n");
121#endif
122 return (size_b0);
wdenkaffae2b2002-08-17 09:36:01 +0000123}
124
wdenk7d076412003-05-23 11:38:58 +0000125
wdenkaffae2b2002-08-17 09:36:01 +0000126/*-----------------------------------------------------------------------
127 */
128void flash_print_info (flash_info_t *info)
129{
130 int i;
wdenk7d076412003-05-23 11:38:58 +0000131 int k;
132 int size;
133 int erased;
134 volatile unsigned long *flash;
wdenkaffae2b2002-08-17 09:36:01 +0000135
136 if (info->flash_id == FLASH_UNKNOWN) {
137 printf ("missing or unknown FLASH type\n");
138 return;
139 }
140
141 switch (info->flash_id & FLASH_VENDMASK) {
142 case FLASH_MAN_AMD: printf ("AMD "); break;
143 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
144 case FLASH_MAN_SST: printf ("SST "); break;
145 case FLASH_MAN_INTEL: printf ("Intel "); break;
146 default: printf ("Unknown Vendor "); break;
147 }
148
149 switch (info->flash_id & FLASH_TYPEMASK) {
150 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
151 break;
152 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
153 break;
154 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
155 break;
156 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
157 break;
158 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
159 break;
160 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
161 break;
162 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
163 break;
164 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
165 break;
166 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
167 break;
168 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
169 break;
170 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
171 break;
172 case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
173 break;
174 default: printf ("Unknown Chip Type\n");
175 break;
176 }
177
178 printf (" Size: %ld KB in %d Sectors\n",
179 info->size >> 10, info->sector_count);
180
181 printf (" Sector Start Addresses:");
182 for (i=0; i<info->sector_count; ++i) {
wdenk7d076412003-05-23 11:38:58 +0000183 /*
184 * Check if whole sector is erased
185 */
wdenkaffae2b2002-08-17 09:36:01 +0000186 if (i != (info->sector_count-1))
wdenk7d076412003-05-23 11:38:58 +0000187 size = info->start[i+1] - info->start[i];
wdenkaffae2b2002-08-17 09:36:01 +0000188 else
wdenk7d076412003-05-23 11:38:58 +0000189 size = info->start[0] + info->size - info->start[i];
190 erased = 1;
191 flash = (volatile unsigned long *)info->start[i];
192 size = size >> 2; /* divide by 4 for longword access */
193 for (k=0; k<size; k++) {
194 if (*flash++ != 0xffffffff) {
195 erased = 0;
wdenkaffae2b2002-08-17 09:36:01 +0000196 break;
197 }
wdenk7d076412003-05-23 11:38:58 +0000198 }
wdenkaffae2b2002-08-17 09:36:01 +0000199 if ((i % 5) == 0)
200 printf ("\n ");
wdenkaffae2b2002-08-17 09:36:01 +0000201 printf (" %08lX%s%s",
202 info->start[i],
203 erased ? " E" : " ",
wdenk7d076412003-05-23 11:38:58 +0000204 info->protect[i] ? "RO " : " ");
wdenkaffae2b2002-08-17 09:36:01 +0000205 }
206 printf ("\n");
wdenkaffae2b2002-08-17 09:36:01 +0000207}
208
209/*-----------------------------------------------------------------------
210 */
211
212
213/*-----------------------------------------------------------------------
214 */
215
216/*
217 * The following code cannot be run from FLASH!
218 */
219static ulong flash_get_size (vu_long *addr, flash_info_t *info)
220{
221 short i;
222 FLASH_WORD_SIZE value;
223 ulong base = (ulong)addr;
224 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
225
226 /* Write auto select command: read Manufacturer ID */
227 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
228 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
229 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
230
231 value = addr2[0];
232 /* printf("flash_get_size value: %x\n",value); */
233 switch (value) {
234 case (FLASH_WORD_SIZE)AMD_MANUFACT:
235 info->flash_id = FLASH_MAN_AMD;
236 break;
237 case (FLASH_WORD_SIZE)FUJ_MANUFACT:
238 info->flash_id = FLASH_MAN_FUJ;
239 break;
240 case (FLASH_WORD_SIZE)INTEL_MANUFACT:
241 info->flash_id = FLASH_MAN_INTEL;
242 break;
243 case (FLASH_WORD_SIZE)SST_MANUFACT:
244 info->flash_id = FLASH_MAN_SST;
245 break;
246 default:
247 info->flash_id = FLASH_UNKNOWN;
248 info->sector_count = 0;
249 info->size = 0;
250 return (0); /* no or unknown flash */
251 }
252 value = addr2[1]; /* device ID */
253 /* printf("Device value %x\n",value); */
254 switch (value) {
255 case (FLASH_WORD_SIZE)AMD_ID_F040B:
wdenk57b2d802003-06-27 21:31:46 +0000256 info->flash_id += FLASH_AM040;
wdenkaffae2b2002-08-17 09:36:01 +0000257 info->sector_count = 8;
258 info->size = 0x0080000; /* => 512 ko */
259 break;
260 case (FLASH_WORD_SIZE)AMD_ID_LV400T:
261 info->flash_id += FLASH_AM400T;
262 info->sector_count = 11;
263 info->size = 0x00080000;
264 break; /* => 0.5 MB */
265
266 case (FLASH_WORD_SIZE)AMD_ID_LV400B:
267 info->flash_id += FLASH_AM400B;
268 info->sector_count = 11;
269 info->size = 0x00080000;
270 break; /* => 0.5 MB */
271
272 case (FLASH_WORD_SIZE)AMD_ID_LV800T:
273 info->flash_id += FLASH_AM800T;
274 info->sector_count = 19;
275 info->size = 0x00100000;
276 break; /* => 1 MB */
277
278 case (FLASH_WORD_SIZE)AMD_ID_LV800B:
279 info->flash_id += FLASH_AM800B;
280 info->sector_count = 19;
281 info->size = 0x00100000;
282 break; /* => 1 MB */
283
284 case (FLASH_WORD_SIZE)AMD_ID_LV160T:
285 info->flash_id += FLASH_AM160T;
286 info->sector_count = 35;
287 info->size = 0x00200000;
288 break; /* => 2 MB */
289
290 case (FLASH_WORD_SIZE)AMD_ID_LV160B:
291 info->flash_id += FLASH_AM160B;
292 info->sector_count = 35;
293 info->size = 0x00200000;
294 break; /* => 2 MB */
295#if 0 /* enable when device IDs are available */
296 case (FLASH_WORD_SIZE)AMD_ID_LV320T:
297 info->flash_id += FLASH_AM320T;
298 info->sector_count = 67;
299 info->size = 0x00400000;
300 break; /* => 4 MB */
301
302 case (FLASH_WORD_SIZE)AMD_ID_LV320B:
303 info->flash_id += FLASH_AM320B;
304 info->sector_count = 67;
305 info->size = 0x00400000;
306 break; /* => 4 MB */
307#endif
308 case (FLASH_WORD_SIZE)SST_ID_xF800A:
309 info->flash_id += FLASH_SST800A;
310 info->sector_count = 16;
311 info->size = 0x00100000;
312 break; /* => 1 MB */
313 case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
314 info->flash_id += FLASH_INTEL320T;
315 info->sector_count = 71;
316 info->size = 0x00400000;
317 break; /* => 4 MB */
318
319
320 case (FLASH_WORD_SIZE)SST_ID_xF160A:
321 info->flash_id += FLASH_SST160A;
322 info->sector_count = 32;
323 info->size = 0x00200000;
324 break; /* => 2 MB */
325
326 default:
327 info->flash_id = FLASH_UNKNOWN;
328 return (0); /* => no or unknown flash */
329
330 }
331
332 /* set up sector start address table */
wdenk7d076412003-05-23 11:38:58 +0000333 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
334 (info->flash_id == FLASH_AM040)){
wdenkaffae2b2002-08-17 09:36:01 +0000335 for (i = 0; i < info->sector_count; i++)
336 info->start[i] = base + (i * 0x00010000);
wdenk7d076412003-05-23 11:38:58 +0000337 }
338 else {
wdenkaffae2b2002-08-17 09:36:01 +0000339 if (info->flash_id & FLASH_BTYPE) {
wdenk7d076412003-05-23 11:38:58 +0000340 /* set sector offsets for bottom boot block type */
341 info->start[0] = base + 0x00000000;
342 info->start[1] = base + 0x00004000;
343 info->start[2] = base + 0x00006000;
344 info->start[3] = base + 0x00008000;
345 for (i = 4; i < info->sector_count; i++)
346 info->start[i] = base + (i * 0x00010000) - 0x00030000;
347 }
348 else {
wdenkaffae2b2002-08-17 09:36:01 +0000349 /* set sector offsets for top boot block type */
350 i = info->sector_count - 1;
351 if(info->sector_count==71) {
352
353 info->start[i--] = base + info->size - 0x00002000;
354 info->start[i--] = base + info->size - 0x00004000;
355 info->start[i--] = base + info->size - 0x00006000;
356 info->start[i--] = base + info->size - 0x00008000;
357 info->start[i--] = base + info->size - 0x0000A000;
358 info->start[i--] = base + info->size - 0x0000C000;
359 info->start[i--] = base + info->size - 0x0000E000;
360 for (; i >= 0; i--)
361 info->start[i] = base + i * 0x000010000;
362 }
363 else {
364 info->start[i--] = base + info->size - 0x00004000;
365 info->start[i--] = base + info->size - 0x00006000;
366 info->start[i--] = base + info->size - 0x00008000;
367 for (; i >= 0; i--)
368 info->start[i] = base + i * 0x00010000;
369 }
370 }
371 }
372
373 /* check for protected sectors */
374 for (i = 0; i < info->sector_count; i++) {
375 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
376 /* D0 = 1 if protected */
377 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
wdenk7d076412003-05-23 11:38:58 +0000378 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
379 info->protect[i] = 0;
380 else
381 info->protect[i] = addr2[2] & 1;
wdenkaffae2b2002-08-17 09:36:01 +0000382 }
383
384 /*
385 * Prevent writes to uninitialized FLASH.
386 */
387 if (info->flash_id != FLASH_UNKNOWN) {
wdenkaffae2b2002-08-17 09:36:01 +0000388 addr2 = (FLASH_WORD_SIZE *)info->start[0];
389 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
wdenkaffae2b2002-08-17 09:36:01 +0000390 }
391 return (info->size);
392}
393
wdenk7d076412003-05-23 11:38:58 +0000394
wdenkaffae2b2002-08-17 09:36:01 +0000395int wait_for_DQ7(flash_info_t *info, int sect)
396{
397 ulong start, now, last;
398 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
399
400 start = get_timer (0);
wdenk7d076412003-05-23 11:38:58 +0000401 last = start;
402 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
403 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
404 printf ("Timeout\n");
405 return -1;
406 }
407 /* show that we're waiting */
408 if ((now - last) > 1000) { /* every second */
409 putc ('.');
410 last = now;
411 }
412 }
wdenkaffae2b2002-08-17 09:36:01 +0000413 return 0;
414}
415
416int intel_wait_for_DQ7(flash_info_t *info, int sect)
417{
418 ulong start, now, last;
419 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
420
wdenk7d076412003-05-23 11:38:58 +0000421 start = get_timer (0);
422 last = start;
423 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
424 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
425 printf ("Timeout\n");
426 return -1;
427 }
428 /* show that we're waiting */
429 if ((now - last) > 1000) { /* every second */
430 putc ('.');
431 last = now;
432 }
433 }
434 addr[0]=(FLASH_WORD_SIZE)0x00500050;
wdenkaffae2b2002-08-17 09:36:01 +0000435 return 0;
436}
437
438/*-----------------------------------------------------------------------
439 */
440
441int flash_erase (flash_info_t *info, int s_first, int s_last)
442{
443 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
444 volatile FLASH_WORD_SIZE *addr2;
445 int flag, prot, sect, l_sect;
446 int i;
447
448
449 if ((s_first < 0) || (s_first > s_last)) {
450 if (info->flash_id == FLASH_UNKNOWN) {
451 printf ("- missing\n");
452 } else {
453 printf ("- no sectors to erase\n");
454 }
455 return 1;
456 }
457
458 if (info->flash_id == FLASH_UNKNOWN) {
459 printf ("Can't erase unknown flash type - aborted\n");
460 return 1;
461 }
462
463 prot = 0;
464 for (sect=s_first; sect<=s_last; ++sect) {
465 if (info->protect[sect]) {
466 prot++;
467 }
468 }
469
470 if (prot) {
471 printf ("- Warning: %d protected sectors will not be erased!\n",
472 prot);
473 } else {
474 printf ("\n");
475 }
476
477 l_sect = -1;
478
479 /* Disable interrupts which might cause a timeout here */
480 flag = disable_interrupts();
481
482 /* Start erase on unprotected sectors */
483 for (sect = s_first; sect<=s_last; sect++) {
484 if (info->protect[sect] == 0) { /* not protected */
485 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
486 /* printf("Erasing sector %p\n", addr2); */ /* CLH */
wdenk7d076412003-05-23 11:38:58 +0000487 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
wdenkaffae2b2002-08-17 09:36:01 +0000488 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
489 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
490 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
491 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
492 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
493 addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
494 for (i=0; i<50; i++)
495 udelay(1000); /* wait 1 ms */
wdenk7d076412003-05-23 11:38:58 +0000496 wait_for_DQ7(info, sect);
497 }
498 else {
wdenk57b2d802003-06-27 21:31:46 +0000499 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
wdenkaffae2b2002-08-17 09:36:01 +0000500 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
501 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
wdenk7d076412003-05-23 11:38:58 +0000502 intel_wait_for_DQ7(info, sect);
wdenkaffae2b2002-08-17 09:36:01 +0000503 addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
504 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
wdenk7d076412003-05-23 11:38:58 +0000505 intel_wait_for_DQ7(info, sect);
wdenkaffae2b2002-08-17 09:36:01 +0000506 }
507 else {
508 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
509 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
510 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
511 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
512 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
513 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
wdenk7d076412003-05-23 11:38:58 +0000514 wait_for_DQ7(info, sect);
515 }
516 }
517 l_sect = sect;
518 /*
519 * Wait for each sector to complete, it's more
520 * reliable. According to AMD Spec, you must
521 * issue all erase commands within a specified
522 * timeout. This has been seen to fail, especially
523 * if printf()s are included (for debug)!!
524 */
525 /* wait_for_DQ7(info, sect); */
wdenkaffae2b2002-08-17 09:36:01 +0000526 }
527 }
528
529 /* re-enable interrupts if necessary */
530 if (flag)
531 enable_interrupts();
532
533 /* wait at least 80us - let's wait 1 ms */
534 udelay (1000);
535
536#if 0
537 /*
538 * We wait for the last triggered sector
539 */
540 if (l_sect < 0)
541 goto DONE;
542 wait_for_DQ7(info, l_sect);
543
544DONE:
545#endif
546 /* reset to read mode */
547 addr = (FLASH_WORD_SIZE *)info->start[0];
548 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
549
550 printf (" done\n");
551 return 0;
552}
553
wdenk7d076412003-05-23 11:38:58 +0000554
wdenkaffae2b2002-08-17 09:36:01 +0000555void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
556{
557 int i;
558 volatile FLASH_WORD_SIZE *addr2;
559 long c;
560 c= (long)cnt;
561 for(i=info->sector_count-1;i>0;i--)
562 {
563 if(addr>=info->start[i])
564 break;
565 }
566 do {
567 addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
568 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
569 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
570 intel_wait_for_DQ7(info, i);
571 i++;
572 c-=(info->start[i]-info->start[i-1]);
573 }while(c>0);
wdenkaffae2b2002-08-17 09:36:01 +0000574}
575
576
577/*-----------------------------------------------------------------------
578 * Copy memory to flash, returns:
579 * 0 - OK
580 * 1 - write timeout
581 * 2 - Flash not erased
582 */
583
584int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
585{
586 ulong cp, wp, data;
587 int i, l, rc;
588
589 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
590 unlock_intel_sectors(info,addr,cnt);
591 }
592 wp = (addr & ~3); /* get lower word aligned address */
593 /*
594 * handle unaligned start bytes
595 */
596 if ((l = addr - wp) != 0) {
597 data = 0;
598 for (i=0, cp=wp; i<l; ++i, ++cp) {
599 data = (data << 8) | (*(uchar *)cp);
600 }
601 for (; i<4 && cnt>0; ++i) {
602 data = (data << 8) | *src++;
603 --cnt;
604 ++cp;
605 }
606 for (; cnt==0 && i<4; ++i, ++cp) {
607 data = (data << 8) | (*(uchar *)cp);
608 }
609
610 if ((rc = write_word(info, wp, data)) != 0) {
611 return (rc);
612 }
613 wp += 4;
614 }
615
616 /*
617 * handle word aligned part
618 */
619 while (cnt >= 4) {
620 data = 0;
621 for (i=0; i<4; ++i) {
622 data = (data << 8) | *src++;
623 }
624 if ((rc = write_word(info, wp, data)) != 0) {
625 return (rc);
626 }
627 wp += 4;
628 if((wp % 0x10000)==0)
629 printf("."); /* show Progress */
630 cnt -= 4;
631 }
632
633 if (cnt == 0) {
634 return (0);
635 }
636
637 /*
638 * handle unaligned tail bytes
639 */
640 data = 0;
641 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
642 data = (data << 8) | *src++;
643 --cnt;
644 }
645 for (; i<4; ++i, ++cp) {
646 data = (data << 8) | (*(uchar *)cp);
647 }
648 rc=write_word(info, wp, data);
649 return rc;
650}
651
652/*-----------------------------------------------------------------------
653 * Write a word to Flash, returns:
654 * 0 - OK
655 * 1 - write timeout
656 * 2 - Flash not erased
657 */
658static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
659
660static int write_word (flash_info_t *info, ulong dest, ulong data)
661{
662 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
663 volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
wdenk57b2d802003-06-27 21:31:46 +0000664 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
wdenkaffae2b2002-08-17 09:36:01 +0000665 ulong start;
666 int flag;
667 int i;
668
669 /* Check if Flash is (sufficiently) erased */
670 if ((*((volatile FLASH_WORD_SIZE *)dest) &
671 (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
672 return (2);
673 }
674 /* Disable interrupts which might cause a timeout here */
675 flag = disable_interrupts();
676 for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
677 {
678 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
679 /* intel style writting */
680 dest2[i] = (FLASH_WORD_SIZE)0x00500050;
681 dest2[i] = (FLASH_WORD_SIZE)0x00400040;
682 *read_val++ = data2[i];
683 dest2[i] = data2[i];
684 if (flag)
685 enable_interrupts();
686 /* data polling for D7 */
687 start = get_timer (0);
688 udelay(10);
689 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
690 {
691 if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
692 return (1);
693 }
694 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
695 udelay(10);
696 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
697 if(dest2[i]!=data2[i])
698 printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
699 }
700 else {
701 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
702 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
703 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
704 dest2[i] = data2[i];
705 /* re-enable interrupts if necessary */
706 if (flag)
707 enable_interrupts();
708 /* data polling for D7 */
709 start = get_timer (0);
710 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
711 (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
712 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
wdenk57b2d802003-06-27 21:31:46 +0000713 return (1);
wdenkaffae2b2002-08-17 09:36:01 +0000714 }
715 }
716 }
717 }
718 return (0);
719}
720
721/*-----------------------------------------------------------------------
722 */