Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 86e2987816dffd82331b31b459f6f21d7ddddf1d / . / configs / evb-rk3036_defconfig
blob: 4dd4586243421d81588abb8b70064a18e4637824 [file] [log] [blame]
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_ROCKCHIP_RK3036=y
4CONFIG_TARGET_EVB_RK3036=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]5CONFIG_SPL_STACK_R_ADDR=0x80000
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]6CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
7CONFIG_SPL_STACK_R=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]8CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]9CONFIG_CMD_BOOTZ=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]10# CONFIG_CMD_IMLS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]11CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]12CONFIG_CMD_SF=y
13CONFIG_CMD_SPI=y
14CONFIG_CMD_I2C=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]15# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]16CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]17CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]18CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]19CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]20CONFIG_CMD_TIME=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_EXT2=y
22CONFIG_CMD_EXT4=y
23CONFIG_CMD_FAT=y
24CONFIG_CMD_FS_GENERIC=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]25CONFIG_REGMAP=y
26CONFIG_SYSCON=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]27CONFIG_CLK=y
28CONFIG_ROCKCHIP_GPIO=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]29CONFIG_SYS_I2C_ROCKCHIP=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]30CONFIG_LED=y
31CONFIG_RESET=y
32CONFIG_DM_MMC=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]33CONFIG_ROCKCHIP_DWMMC=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]34CONFIG_PINCTRL=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]35CONFIG_ROCKCHIP_3036_PINCTRL=y
huang lin2de748f2015-11-17 14:20:28 +0800[diff] [blame]36CONFIG_RAM=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]37# CONFIG_SPL_SERIAL_PRESENT is not set
Simon Glasse0f177b2015-12-13 21:37:00 -0700[diff] [blame]38CONFIG_DEBUG_UART=y
Simon Glasse0f177b2015-12-13 21:37:00 -0700[diff] [blame]39CONFIG_DEBUG_UART_BASE=0x20068000
40CONFIG_DEBUG_UART_CLOCK=24000000
41CONFIG_DEBUG_UART_SHIFT=2
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]42CONFIG_USE_PRIVATE_LIBGCC=y
43CONFIG_CMD_DHRYSTONE=y
44CONFIG_ERRNO_STR=y