blob: eff1ef6e2cc83aba94d041996682b3616002c1be [file] [log] [blame]
Tho Vu38b5c392023-02-28 22:37:06 +01001// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the White Hawk CPU and BreakOut boards
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r8a779g0-white-hawk-cpu.dtsi"
10#include "r8a779g0-white-hawk-csi-dsi.dtsi"
11#include "r8a779g0-white-hawk-ethernet.dtsi"
12
13/ {
14 model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0";
15 compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0";
Marek Vasutd730a922023-09-17 16:13:13 +020016
17 can_transceiver0: can-phy0 {
18 compatible = "nxp,tjr1443";
19 #phy-cells = <0>;
20 enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
21 max-bitrate = <5000000>;
22 };
23};
24
25&can_clk {
26 clock-frequency = <40000000>;
27};
28
29&canfd {
30 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>;
31 pinctrl-names = "default";
32
33 status = "okay";
34
35 channel0 {
36 status = "okay";
37 phys = <&can_transceiver0>;
38 };
39
40 channel1 {
41 status = "okay";
42 };
Tho Vu38b5c392023-02-28 22:37:06 +010043};
44
45&i2c0 {
46 eeprom@51 {
47 compatible = "rohm,br24g01", "atmel,24c01";
48 label = "breakout-board";
49 reg = <0x51>;
50 pagesize = <8>;
51 };
52};
Marek Vasutd730a922023-09-17 16:13:13 +020053
54&pfc {
55 can_clk_pins: can-clk {
56 groups = "can_clk";
57 function = "can_clk";
58 };
59
60 canfd0_pins: canfd0 {
61 groups = "canfd0_data";
62 function = "canfd0";
63 };
64
65 canfd1_pins: canfd1 {
66 groups = "canfd1_data";
67 function = "canfd1";
68 };
69};