blob: 943e16010593e6f0fb1ecdfd55c96cad1db14441 [file] [log] [blame]
Aaron Williams2f6fd4a2020-12-11 17:05:48 +01001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020 Marvell International Ltd.
4 */
5
6#ifndef __CVMX_RST_DEFS_H__
7#define __CVMX_RST_DEFS_H__
8
9#define CVMX_RST_CTLX(offset) (0x0001180006001640ull + ((offset) & 3) * 8)
10#define CVMX_RST_SOFT_PRSTX(offset) (0x00011800060016C0ull + ((offset) & 3) * 8)
11
12/**
13 * cvmx_rst_ctl#
14 */
15union cvmx_rst_ctlx {
16 u64 u64;
17 struct cvmx_rst_ctlx_s {
18 u64 reserved_10_63 : 54;
19 u64 prst_link : 1;
20 u64 rst_done : 1;
21 u64 rst_link : 1;
22 u64 host_mode : 1;
23 u64 reserved_4_5 : 2;
24 u64 rst_drv : 1;
25 u64 rst_rcv : 1;
26 u64 rst_chip : 1;
27 u64 rst_val : 1;
28 } s;
29 struct cvmx_rst_ctlx_s cn70xx;
30 struct cvmx_rst_ctlx_s cn70xxp1;
31 struct cvmx_rst_ctlx_s cn73xx;
32 struct cvmx_rst_ctlx_s cn78xx;
33 struct cvmx_rst_ctlx_s cn78xxp1;
34 struct cvmx_rst_ctlx_s cnf75xx;
35};
36
37typedef union cvmx_rst_ctlx cvmx_rst_ctlx_t;
38
39/**
40 * cvmx_rst_soft_prst#
41 */
42union cvmx_rst_soft_prstx {
43 u64 u64;
44 struct cvmx_rst_soft_prstx_s {
45 u64 reserved_1_63 : 63;
46 u64 soft_prst : 1;
47 } s;
48 struct cvmx_rst_soft_prstx_s cn70xx;
49 struct cvmx_rst_soft_prstx_s cn70xxp1;
50 struct cvmx_rst_soft_prstx_s cn73xx;
51 struct cvmx_rst_soft_prstx_s cn78xx;
52 struct cvmx_rst_soft_prstx_s cn78xxp1;
53 struct cvmx_rst_soft_prstx_s cnf75xx;
54};
55
56typedef union cvmx_rst_soft_prstx cvmx_rst_soft_prstx_t;
57
58/**
59 * cvmx_rst_soft_rst
60 */
61union cvmx_rst_soft_rst {
62 u64 u64;
63 struct cvmx_rst_soft_rst_s {
64 u64 reserved_1_63 : 63;
65 u64 soft_rst : 1;
66 } s;
67 struct cvmx_rst_soft_rst_s cn70xx;
68 struct cvmx_rst_soft_rst_s cn70xxp1;
69 struct cvmx_rst_soft_rst_s cn73xx;
70 struct cvmx_rst_soft_rst_s cn78xx;
71 struct cvmx_rst_soft_rst_s cn78xxp1;
72 struct cvmx_rst_soft_rst_s cnf75xx;
73};
74
75typedef union cvmx_rst_soft_rst cvmx_rst_soft_rst_t;
76
77#endif