blob: 265e9ce588ada04a655595543f80173961e926ef [file] [log] [blame]
Masahiro Yamada8204bd12015-03-16 16:43:24 +09001if ARCH_ZYNQ
Masahiro Yamadaa3cd8982014-08-31 07:10:55 +09002
Tien Fong Chee6fd0a712019-01-23 14:20:03 +08003config SPL_FS_FAT
Simon Glass6172e2e2016-09-12 23:18:38 -06004 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassf6de2572016-09-12 23:18:42 -06009config SPL_LIBDISK_SUPPORT
10 default y
11
Simon Glassb16c92c2016-09-12 23:18:43 -060012config SPL_LIBGENERIC_SUPPORT
13 default y
14
Simon Glassb58bfe02021-08-08 12:20:09 -060015config SPL_MMC
Masahiro Yamada168c57d2017-01-30 19:46:51 +090016 default y if MMC_SDHCI_ZYNQ
Simon Glassbd58f1d2016-09-12 23:18:44 -060017
Simon Glassf4d60392021-08-08 12:20:12 -060018config SPL_SERIAL
Simon Glasse076d6f2016-09-12 23:18:56 -060019 default y
20
Simon Glass219d6122016-09-12 23:18:57 -060021config SPL_SPI_FLASH_SUPPORT
22 default y if ZYNQ_QSPI
23
Simon Glassa5820472021-08-08 12:20:14 -060024config SPL_SPI
Simon Glassb24fdca2016-09-12 23:18:58 -060025 default y if ZYNQ_QSPI
26
Siva Durga Prasad Paladugud8e4e1c2017-05-12 15:04:11 +053027config ZYNQ_DDRC_INIT
28 bool "Zynq DDRC initialization"
29 default y
30 help
31 This option used to perform DDR specific initialization
32 if required. There might be cases like ddr less where we
33 want to skip ddr init and this option is useful for it.
34
Masahiro Yamadaa3cd8982014-08-31 07:10:55 +090035config SYS_BOARD
Michal Simek1f5642a2018-03-04 16:15:15 +010036 string "Board name"
Masahiro Yamadaa3cd8982014-08-31 07:10:55 +090037 default "zynq"
38
39config SYS_VENDOR
Mike Looijmans7d666062016-09-28 07:46:30 +020040 string "Vendor name"
Masahiro Yamadaa3cd8982014-08-31 07:10:55 +090041 default "xilinx"
42
43config SYS_SOC
Masahiro Yamadaa3cd8982014-08-31 07:10:55 +090044 default "zynq"
45
Simon Glasscb3e4892016-07-05 17:10:13 -060046config SYS_MALLOC_F_LEN
Anton Gerasimovd6f88e32018-12-24 02:29:04 +010047 default 0x800
Simon Glasscb3e4892016-07-05 17:10:13 -060048
Siva Durga Prasad Paladugu9adb5262018-07-20 15:11:38 +053049config SYS_MALLOC_LEN
50 default 0x1400000
51
Mike Looijmans96e706f2016-09-20 11:37:24 +020052config BOOT_INIT_FILE
53 string "boot.bin init register filename"
54 default ""
55 help
56 Add register writes to boot.bin format (max 256 pairs).
57 Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
58
Vipul Kumar62548002018-02-28 15:53:28 +053059config ZYNQ_SDHCI_MAX_FREQ
60 default 52000000
61
Michal Simek5f884852020-08-27 15:34:11 +020062source "board/xilinx/Kconfig"
63source "board/xilinx/zynq/Kconfig"
64
Masahiro Yamadaa3cd8982014-08-31 07:10:55 +090065endif