Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 2 | /* Copyright 2013 Freescale Semiconductor, Inc. |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 3 | */ |
| 4 | |
| 5 | #include <common.h> |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame^] | 6 | #include <clock_legacy.h> |
Simon Glass | a73bda4 | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 7 | #include <console.h> |
Simon Glass | 79fd214 | 2019-08-01 09:46:43 -0600 | [diff] [blame] | 8 | #include <env.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 9 | #include <env_internal.h> |
Simon Glass | 284f71b | 2019-12-28 10:44:45 -0700 | [diff] [blame] | 10 | #include <init.h> |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 11 | #include <ns16550.h> |
| 12 | #include <malloc.h> |
| 13 | #include <mmc.h> |
| 14 | #include <nand.h> |
| 15 | #include <i2c.h> |
| 16 | #include <fsl_esdhc.h> |
| 17 | #include <spi_flash.h> |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 18 | #include "../common/spl.h" |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 19 | |
| 20 | DECLARE_GLOBAL_DATA_PTR; |
| 21 | |
Tom Rini | 2181806 | 2014-02-25 12:44:13 -0500 | [diff] [blame] | 22 | phys_size_t get_effective_memsize(void) |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 23 | { |
| 24 | return CONFIG_SYS_L2_SIZE; |
| 25 | } |
| 26 | |
| 27 | void board_init_f(ulong bootflag) |
| 28 | { |
| 29 | u32 plat_ratio; |
| 30 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
Jaiprakash Singh | dd88806 | 2015-03-20 19:28:27 -0700 | [diff] [blame] | 31 | struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 32 | |
| 33 | console_init_f(); |
| 34 | |
| 35 | /* Clock configuration to access CPLD using IFC(GPCM) */ |
Jaiprakash Singh | dd88806 | 2015-03-20 19:28:27 -0700 | [diff] [blame] | 36 | setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT); |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 37 | |
York Sun | 7f945ca | 2016-11-16 13:30:06 -0800 | [diff] [blame] | 38 | #ifdef CONFIG_TARGET_P1010RDB_PB |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 39 | setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS); |
| 40 | #endif |
| 41 | |
| 42 | /* initialize selected port with appropriate baud rate */ |
| 43 | plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
| 44 | plat_ratio >>= 1; |
| 45 | gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; |
| 46 | |
| 47 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
| 48 | gd->bus_clk / 16 / CONFIG_BAUDRATE); |
| 49 | |
| 50 | #ifdef CONFIG_SPL_MMC_BOOT |
| 51 | puts("\nSD boot...\n"); |
| 52 | #elif defined(CONFIG_SPL_SPI_BOOT) |
| 53 | puts("\nSPI Flash boot...\n"); |
| 54 | #endif |
| 55 | /* copy code to RAM and jump to it - this should not return */ |
| 56 | /* NOTE - code has to be copied out of NAND buffer before |
| 57 | * other blocks can be read. |
| 58 | */ |
| 59 | relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); |
| 60 | } |
| 61 | |
| 62 | void board_init_r(gd_t *gd, ulong dest_addr) |
| 63 | { |
| 64 | /* Pointer is writable since we allocated a register for it */ |
| 65 | gd = (gd_t *)CONFIG_SPL_GD_ADDR; |
| 66 | bd_t *bd; |
| 67 | |
| 68 | memset(gd, 0, sizeof(gd_t)); |
| 69 | bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); |
| 70 | memset(bd, 0, sizeof(bd_t)); |
| 71 | gd->bd = bd; |
| 72 | bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; |
| 73 | bd->bi_memsize = CONFIG_SYS_L2_SIZE; |
| 74 | |
Simon Glass | 302445a | 2017-01-23 13:31:22 -0700 | [diff] [blame] | 75 | arch_cpu_init(); |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 76 | get_clocks(); |
| 77 | mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, |
| 78 | CONFIG_SPL_RELOC_MALLOC_SIZE); |
Sumit Garg | 2ff056b | 2016-05-25 12:41:48 -0400 | [diff] [blame] | 79 | gd->flags |= GD_FLG_FULL_MALLOC_INIT; |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 80 | |
| 81 | #ifndef CONFIG_SPL_NAND_BOOT |
| 82 | env_init(); |
| 83 | #endif |
| 84 | #ifdef CONFIG_SPL_MMC_BOOT |
| 85 | mmc_initialize(bd); |
| 86 | #endif |
| 87 | |
| 88 | /* relocate environment function pointers etc. */ |
| 89 | #ifdef CONFIG_SPL_NAND_BOOT |
| 90 | nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 91 | (uchar *)SPL_ENV_ADDR); |
| 92 | gd->env_addr = (ulong)(SPL_ENV_ADDR); |
Simon Glass | 4bc2ad2 | 2017-08-03 12:21:56 -0600 | [diff] [blame] | 93 | gd->env_valid = ENV_VALID; |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 94 | #else |
| 95 | env_relocate(); |
| 96 | #endif |
| 97 | |
| 98 | i2c_init_all(); |
| 99 | |
Simon Glass | d35f338 | 2017-04-06 12:47:05 -0600 | [diff] [blame] | 100 | dram_init(); |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 101 | #ifdef CONFIG_SPL_NAND_BOOT |
| 102 | puts("\nTertiary program loader running in sram..."); |
| 103 | #else |
| 104 | puts("\nSecond program loader running in sram..."); |
| 105 | #endif |
| 106 | |
| 107 | #ifdef CONFIG_SPL_MMC_BOOT |
| 108 | mmc_boot(); |
| 109 | #elif defined(CONFIG_SPL_SPI_BOOT) |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 110 | fsl_spi_boot(); |
Ying Zhang | 1233cbc | 2014-01-24 15:50:09 +0800 | [diff] [blame] | 111 | #elif defined(CONFIG_SPL_NAND_BOOT) |
| 112 | nand_boot(); |
| 113 | #endif |
| 114 | } |