Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> |
| 3 | * |
| 4 | * Configuation settings for the AFEB9260 board. |
| 5 | * Based on configuration for AT91SAM9260-EK |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __CONFIG_H |
| 27 | #define __CONFIG_H |
| 28 | |
| 29 | /* ARM asynchronous clock */ |
| 30 | #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ |
| 31 | #define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ |
Jean-Christophe PLAGNIOL-VILLARD | f88438a | 2008-12-14 10:29:39 +0100 | [diff] [blame] | 32 | #define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 33 | #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ |
| 34 | |
| 35 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
| 36 | |
| 37 | #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ |
| 38 | #define CONFIG_AFEB9260 1 /* on an AFEB9260 Board */ |
| 39 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 40 | |
| 41 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 42 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 43 | #define CONFIG_INITRD_TAG 1 |
| 44 | |
| 45 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 46 | #define CONFIG_SKIP_RELOCATE_UBOOT |
| 47 | |
| 48 | /* |
| 49 | * Hardware drivers |
| 50 | */ |
| 51 | #define CONFIG_ATMEL_USART 1 |
| 52 | #undef CONFIG_USART0 |
| 53 | #undef CONFIG_USART1 |
| 54 | #undef CONFIG_USART2 |
| 55 | #define CONFIG_USART3 1 /* USART 3 is DBGU */ |
| 56 | |
| 57 | #define CONFIG_BOOTDELAY 3 |
| 58 | |
| 59 | /* |
| 60 | * BOOTP options |
| 61 | */ |
| 62 | #define CONFIG_BOOTP_BOOTFILESIZE 1 |
| 63 | #define CONFIG_BOOTP_BOOTPATH 1 |
| 64 | #define CONFIG_BOOTP_GATEWAY 1 |
| 65 | #define CONFIG_BOOTP_HOSTNAME 1 |
| 66 | |
| 67 | /* |
| 68 | * Command line configuration. |
| 69 | */ |
| 70 | #include <config_cmd_default.h> |
| 71 | #undef CONFIG_CMD_BDI |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 72 | #undef CONFIG_CMD_FPGA |
Wolfgang Denk | 85c25df | 2009-04-01 23:34:12 +0200 | [diff] [blame^] | 73 | #undef CONFIG_CMD_IMI |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 74 | #undef CONFIG_CMD_IMLS |
Wolfgang Denk | 85c25df | 2009-04-01 23:34:12 +0200 | [diff] [blame^] | 75 | #undef CONFIG_CMD_LOADS |
| 76 | #undef CONFIG_CMD_SOURCE |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 77 | |
| 78 | #define CONFIG_CMD_PING 1 |
| 79 | #define CONFIG_CMD_DHCP 1 |
| 80 | |
| 81 | #define CONFIG_CMD_NAND 1 |
| 82 | #define CONFIG_CMD_USB 1 |
| 83 | |
| 84 | /* SDRAM */ |
| 85 | #define CONFIG_NR_DRAM_BANKS 1 |
| 86 | #define PHYS_SDRAM 0x20000000 |
| 87 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
| 88 | |
| 89 | /* DataFlash */ |
| 90 | #define CONFIG_HAS_DATAFLASH 1 |
| 91 | #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) |
| 92 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
| 93 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
| 94 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ |
| 95 | #define AT91_SPI_CLK 15000000 |
| 96 | #define DATAFLASH_TCSS (0x1a << 16) |
| 97 | #define DATAFLASH_TCHS (0x1 << 24) |
| 98 | |
| 99 | /* NAND flash */ |
Jean-Christophe PLAGNIOL-VILLARD | c9539ba | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 100 | #ifdef CONFIG_CMD_NAND |
| 101 | #define CONFIG_NAND_ATMEL |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 102 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 103 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 104 | #define CONFIG_SYS_NAND_DBW_8 1 |
Jean-Christophe PLAGNIOL-VILLARD | c9539ba | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 105 | /* our ALE is AD21 */ |
| 106 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 107 | /* our CLE is AD22 */ |
| 108 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 109 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| 110 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
| 111 | #endif |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 112 | |
| 113 | /* NOR flash - no real flash on this board */ |
| 114 | #define CONFIG_SYS_NO_FLASH 1 |
| 115 | |
| 116 | /* Ethernet */ |
| 117 | #define CONFIG_MACB 1 |
| 118 | #undef CONFIG_RMII /* We have full MII there */ |
| 119 | #define CONFIG_RESET_PHY_R 1 |
| 120 | |
| 121 | #define CONFIG_NET_MULTI 1 |
| 122 | #define CONFIG_NET_RETRY_COUNT 20 |
| 123 | |
| 124 | /* USB */ |
| 125 | #define CONFIG_USB_OHCI_NEW 1 |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 126 | #define CONFIG_DOS_PARTITION 1 |
| 127 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
| 128 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ |
| 129 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" |
| 130 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
| 131 | #define CONFIG_USB_STORAGE 1 |
| 132 | |
| 133 | #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */ |
| 134 | |
| 135 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
| 136 | #define CONFIG_SYS_MEMTEST_END 0x21e00000 |
| 137 | |
| 138 | #undef CONFIG_SYS_USE_DATAFLASH_CS0 |
| 139 | #define CONFIG_SYS_USE_DATAFLASH_CS1 1 |
| 140 | #undef CONFIG_SYS_USE_NANDFLASH |
| 141 | |
| 142 | /* bootstrap + u-boot + env + linux in dataflash on CS1 */ |
| 143 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
| 144 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
| 145 | #define CONFIG_ENV_OFFSET 0x4200 |
| 146 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) |
| 147 | #define CONFIG_ENV_SIZE 0x4200 |
| 148 | #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm" |
| 149 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 150 | "root=/dev/mtdblock2 " \ |
| 151 | "rw rootfstype=jffs2 panic=20" |
| 152 | |
| 153 | #define CONFIG_BAUDRATE 115200 |
| 154 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
| 155 | |
| 156 | #define CONFIG_SYS_PROMPT "U-Boot> " |
| 157 | #define CONFIG_SYS_CBSIZE 256 |
| 158 | #define CONFIG_SYS_MAXARGS 16 |
| 159 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
Jean-Christophe PLAGNIOL-VILLARD | f88438a | 2008-12-14 10:29:39 +0100 | [diff] [blame] | 160 | #define CONFIG_SYS_LONGHELP 1 |
Sergey Lapin | 77e524c | 2008-10-31 12:28:43 +0100 | [diff] [blame] | 161 | #define CONFIG_CMDLINE_EDITING 1 |
| 162 | |
| 163 | #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) |
| 164 | /* |
| 165 | * Size of malloc() pool |
| 166 | */ |
| 167 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
| 168 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ |
| 169 | |
| 170 | #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ |
| 171 | |
| 172 | #ifdef CONFIG_USE_IRQ |
| 173 | #error CONFIG_USE_IRQ not supported |
| 174 | #endif |
| 175 | |
| 176 | #endif |