blob: 7a4039c55aaaca0e53b2e3153295901ef2e5df4e [file] [log] [blame]
Stelian Pop0bf5cad2008-05-08 18:52:25 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9RLEK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Popcea5c532008-05-08 14:52:32 +020031#define AT91_CPU_NAME "AT91SAM9RL"
Stelian Popad1aa1c2008-11-07 13:55:14 +010032#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
33#define AT91_MASTER_CLOCK 100000000 /* peripheral */
34#define AT91_CPU_CLOCK 200000000 /* cpu */
35#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020036
37#define AT91_SLOW_CLOCK 32768 /* slow clock */
38
39#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
40#define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/
41#define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */
42#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43
44#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
45#define CONFIG_SETUP_MEMORY_TAGS 1
46#define CONFIG_INITRD_TAG 1
47
48#define CONFIG_SKIP_LOWLEVEL_INIT
49#define CONFIG_SKIP_RELOCATE_UBOOT
50
51/*
52 * Hardware drivers
53 */
54#define CONFIG_ATMEL_USART 1
55#undef CONFIG_USART0
56#undef CONFIG_USART1
57#undef CONFIG_USART2
58#define CONFIG_USART3 1 /* USART 3 is DBGU */
59
Stelian Popcea5c532008-05-08 14:52:32 +020060/* LCD */
61#define CONFIG_LCD 1
62#define LCD_BPP LCD_COLOR8
63#define CONFIG_LCD_LOGO 1
64#undef LCD_TEST_PATTERN
65#define CONFIG_LCD_INFO 1
66#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020067#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Popcea5c532008-05-08 14:52:32 +020068#define CONFIG_ATMEL_LCD 1
69#define CONFIG_ATMEL_LCD_RGB565 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020070#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Popcea5c532008-05-08 14:52:32 +020071
Jean-Christophe PLAGNIOL-VILLARD476d10e2009-03-21 21:08:00 +010072/* LED */
73#define CONFIG_AT91_LED
74#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */
75#define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */
76#define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */
77
Stelian Pop0bf5cad2008-05-08 18:52:25 +020078#define CONFIG_BOOTDELAY 3
79
Stelian Pop0bf5cad2008-05-08 18:52:25 +020080/*
81 * Command line configuration.
82 */
83#include <config_cmd_default.h>
84#undef CONFIG_CMD_BDI
85#undef CONFIG_CMD_IMI
86#undef CONFIG_CMD_AUTOSCRIPT
87#undef CONFIG_CMD_FPGA
88#undef CONFIG_CMD_LOADS
89#undef CONFIG_CMD_IMLS
90#undef CONFIG_CMD_NET
91#undef CONFIG_CMD_USB
92
93#define CONFIG_CMD_NAND 1
94
95/* SDRAM */
96#define CONFIG_NR_DRAM_BANKS 1
97#define PHYS_SDRAM 0x20000000
98#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
99
100/* DataFlash */
101#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200102#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
103#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
104#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200105#define AT91_SPI_CLK 15000000
106#define DATAFLASH_TCSS (0x1a << 16)
107#define DATAFLASH_TCHS (0x1 << 24)
108
109/* NOR flash - not present */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110#define CONFIG_SYS_NO_FLASH 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200111
112/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100113#ifdef CONFIG_CMD_NAND
114#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200115#define CONFIG_SYS_MAX_NAND_DEVICE 1
116#define CONFIG_SYS_NAND_BASE 0x40000000
117#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100118/* our ALE is AD21 */
119#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
120/* our CLE is AD22 */
121#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
122#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
123#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
124#endif
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200125
126/* Ethernet - not present */
127
128/* USB - not supported */
129
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200131
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
133#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200134
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200135#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200136
137/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD2b14d2b2008-09-10 22:47:58 +0200138#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200139#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200140#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200141#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200142#define CONFIG_ENV_SIZE 0x4200
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200143#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
144#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
145 "root=/dev/mtdblock0 " \
146 "mtdparts=at91_nand:-(root) "\
147 "rw rootfstype=jffs2"
148
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200150
151/* bootstrap + u-boot + env + linux in nandflash */
Jean-Christophe PLAGNIOL-VILLARDdda84dd2008-09-10 22:47:58 +0200152#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200153#define CONFIG_ENV_OFFSET 0x60000
154#define CONFIG_ENV_OFFSET_REDUND 0x80000
155#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200156#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
157#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
158 "root=/dev/mtdblock5 " \
159 "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
160 "rw rootfstype=jffs2"
161
162#endif
163
164#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200165#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200166
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200167#define CONFIG_SYS_PROMPT "U-Boot> "
168#define CONFIG_SYS_CBSIZE 256
169#define CONFIG_SYS_MAXARGS 16
170#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
171#define CONFIG_SYS_LONGHELP 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200172#define CONFIG_CMDLINE_EDITING 1
173
174#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
175/*
176 * Size of malloc() pool
177 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
179#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200180
181#define CONFIG_STACKSIZE (32*1024) /* regular stack */
182
183#ifdef CONFIG_USE_IRQ
184#error CONFIG_USE_IRQ not supported
185#endif
186
187#endif