Andy Fleming | ee0e917 | 2007-08-14 00:14:25 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2006 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * Dave Liu <daveliu@freescale.com> |
| 5 | * based on source code of Shlomi Gridish |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #include "common.h" |
| 24 | #include "asm/errno.h" |
| 25 | #include "asm/io.h" |
| 26 | #include "asm/immap_85xx.h" |
| 27 | |
| 28 | #if defined(CONFIG_QE) |
| 29 | #define NUM_OF_PINS 32 |
| 30 | void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) |
| 31 | { |
| 32 | u32 pin_2bit_mask; |
| 33 | u32 pin_2bit_dir; |
| 34 | u32 pin_2bit_assign; |
| 35 | u32 pin_1bit_mask; |
| 36 | u32 tmp_val; |
Kumar Gala | ec1340d | 2007-11-27 23:25:02 -0600 | [diff] [blame] | 37 | volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); |
Andy Fleming | ee0e917 | 2007-08-14 00:14:25 -0500 | [diff] [blame] | 38 | volatile par_io_t *par_io = (volatile par_io_t *) |
Kumar Gala | ec1340d | 2007-11-27 23:25:02 -0600 | [diff] [blame] | 39 | &(gur->qe_par_io); |
Andy Fleming | ee0e917 | 2007-08-14 00:14:25 -0500 | [diff] [blame] | 40 | |
| 41 | /* Caculate pin location and 2bit mask and dir */ |
| 42 | pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); |
| 43 | pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); |
| 44 | |
| 45 | /* Setup the direction */ |
| 46 | tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \ |
| 47 | in_be32(&par_io[port].cpdir2) : |
| 48 | in_be32(&par_io[port].cpdir1); |
| 49 | |
| 50 | if (pin > (NUM_OF_PINS/2) -1) { |
| 51 | out_be32(&par_io[port].cpdir2, ~pin_2bit_mask & tmp_val); |
| 52 | out_be32(&par_io[port].cpdir2, pin_2bit_dir | tmp_val); |
| 53 | } else { |
| 54 | out_be32(&par_io[port].cpdir1, ~pin_2bit_mask & tmp_val); |
| 55 | out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val); |
| 56 | } |
| 57 | |
| 58 | /* Calculate pin location for 1bit mask */ |
| 59 | pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); |
| 60 | |
| 61 | /* Setup the open drain */ |
| 62 | tmp_val = in_be32(&par_io[port].cpodr); |
| 63 | if (open_drain) |
| 64 | out_be32(&par_io[port].cpodr, pin_1bit_mask | tmp_val); |
| 65 | else |
| 66 | out_be32(&par_io[port].cpodr, ~pin_1bit_mask & tmp_val); |
| 67 | |
| 68 | /* Setup the assignment */ |
| 69 | tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? |
| 70 | in_be32(&par_io[port].cppar2): |
| 71 | in_be32(&par_io[port].cppar1); |
| 72 | pin_2bit_assign = (u32)(assign |
| 73 | << (NUM_OF_PINS - (pin%(NUM_OF_PINS/2)+1)*2)); |
| 74 | |
| 75 | /* Clear and set 2 bits mask */ |
| 76 | if (pin > (NUM_OF_PINS/2) - 1) { |
| 77 | out_be32(&par_io[port].cppar2, ~pin_2bit_mask & tmp_val); |
| 78 | out_be32(&par_io[port].cppar2, pin_2bit_assign | tmp_val); |
| 79 | } else { |
| 80 | out_be32(&par_io[port].cppar1, ~pin_2bit_mask & tmp_val); |
| 81 | out_be32(&par_io[port].cppar1, pin_2bit_assign | tmp_val); |
| 82 | } |
| 83 | } |
| 84 | |
| 85 | #endif /* CONFIG_QE */ |