blob: 11b72e3789dd886f0d8f13fd3e1f1103df98f43f [file] [log] [blame]
Michal Simeka335bd22016-04-07 16:00:11 +02001CONFIG_ARM=y
2CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5"
3CONFIG_ARCH_ZYNQMP=y
Michal Simek19abc1d2017-02-10 13:57:35 +01004CONFIG_SYS_TEXT_BASE=0x8000000
Michal Simekcbd91182016-06-03 11:35:17 +02005CONFIG_SYS_MALLOC_F_LEN=0x8000
Michal Simek040050b2018-03-23 09:34:00 +01006CONFIG_SPL=y
Michal Simeka932ae72018-06-04 08:33:30 +02007CONFIG_DEBUG_UART_BASE=0xff000000
8CONFIG_DEBUG_UART_CLOCK=100000000
Michal Simeka335bd22016-04-07 16:00:11 +02009CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
Michal Simekbe2b8442017-10-31 14:23:27 +010010CONFIG_DEBUG_UART=y
Tom Rini8db91cf2016-11-29 09:14:57 -050011CONFIG_DISTRO_DEFAULTS=y
Michal Simeka335bd22016-04-07 16:00:11 +020012CONFIG_FIT=y
13CONFIG_FIT_VERBOSE=y
Michal Simek437c59c2016-05-17 08:38:53 +020014CONFIG_SPL_LOAD_FIT=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -040015# CONFIG_DISPLAY_CPUINFO is not set
Mario Six75b23ed2018-03-28 14:38:15 +020016CONFIG_BOARD_EARLY_INIT_R=y
Heiko Schocher1d12ba22016-10-06 07:55:15 +020017CONFIG_SPL_OS_BOOT=y
Michal Simek406d1c62017-12-08 15:01:19 +010018CONFIG_SPL_RAM_SUPPORT=y
19CONFIG_SPL_RAM_DEVICE=y
Luca Ceresoli560f4192018-03-12 17:18:38 +010020CONFIG_SPL_ATF=y
Michal Simeka335bd22016-04-07 16:00:11 +020021CONFIG_SYS_PROMPT="ZynqMP> "
Michal Simeka335bd22016-04-07 16:00:11 +020022CONFIG_CMD_MEMTEST=y
Mario Six00518992018-03-28 14:38:14 +020023CONFIG_SYS_ALT_MEMTEST=y
Michal Simek41f70e22017-12-01 15:35:43 +010024CONFIG_CMD_CLK=y
Michal Simeka335bd22016-04-07 16:00:11 +020025# CONFIG_CMD_FLASH is not set
Michal Simek8bfe60b2017-12-08 15:03:26 +010026CONFIG_CMD_FPGA_LOADBP=y
27CONFIG_CMD_FPGA_LOADP=y
Michal Simek319cff42016-04-13 08:49:03 +020028CONFIG_CMD_I2C=y
Tom Rini78873cd2017-08-14 19:58:53 -040029CONFIG_CMD_MMC=y
Michal Simeka335bd22016-04-07 16:00:11 +020030CONFIG_CMD_TFTPPUT=y
Michal Simeka335bd22016-04-07 16:00:11 +020031CONFIG_CMD_TIME=y
32CONFIG_CMD_TIMER=y
Tom Rini1d9ac832016-04-24 17:29:26 -040033CONFIG_CMD_EXT4_WRITE=y
Michal Simek4c1f7f82016-07-15 08:41:46 +020034CONFIG_SPL_OF_CONTROL=y
Michal Simeka335bd22016-04-07 16:00:11 +020035CONFIG_OF_EMBED=y
Tom Rini5b0b0402017-08-28 07:16:32 -040036CONFIG_ENV_IS_IN_FAT=y
Michal Simek24191972018-03-28 14:30:35 +020037CONFIG_NET_RANDOM_ETHADDR=y
Michal Simekb9c5d132016-07-27 15:08:03 +020038CONFIG_SPL_DM=y
Michal Simek4c1f7f82016-07-15 08:41:46 +020039CONFIG_SPL_DM_SEQ_ALIAS=y
Michal Simeka6604b62017-12-08 14:50:42 +010040CONFIG_CLK_ZYNQMP=y
Siva Durga Prasad Paladugu460fdce2016-01-13 16:25:37 +053041CONFIG_FPGA_XILINX=y
42CONFIG_FPGA_ZYNQMPPL=y
Tom Riniafea41d2016-09-08 16:11:59 -040043CONFIG_DM_GPIO=y
Michal Simekb9c5d132016-07-27 15:08:03 +020044CONFIG_DM_I2C=y
Michal Simek319cff42016-04-13 08:49:03 +020045CONFIG_SYS_I2C_CADENCE=y
Michal Simek46408712017-12-08 14:46:30 +010046CONFIG_MISC=y
Michal Simeka335bd22016-04-07 16:00:11 +020047CONFIG_DM_MMC=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +090048CONFIG_MMC_SDHCI=y
Michal Simek19abc1d2017-02-10 13:57:35 +010049CONFIG_MMC_SDHCI_ZYNQ=y
Michal Simekad16a452018-03-28 14:17:19 +020050CONFIG_PHY_MARVELL=y
51CONFIG_PHY_NATSEMI=y
52CONFIG_PHY_REALTEK=y
53CONFIG_PHY_TI=y
54CONFIG_PHY_VITESSE=y
55CONFIG_PHY_FIXED=y
Michal Simeka335bd22016-04-07 16:00:11 +020056CONFIG_DM_ETH=y
Michal Simekeeb7a342018-01-31 09:18:33 +010057CONFIG_PHY_GIGE=y
58CONFIG_ZYNQ_GEM=y
Michal Simekbe2b8442017-10-31 14:23:27 +010059CONFIG_DEBUG_UART_ZYNQ=y
Michal Simekbe2b8442017-10-31 14:23:27 +010060CONFIG_DEBUG_UART_ANNOUNCE=y
Michal Simekab754532017-11-06 09:16:05 +010061CONFIG_ZYNQ_SERIAL=y
Alexander Graf8d2f5652016-05-11 18:25:49 +020062CONFIG_EFI_LOADER_BOUNCE_BUFFER=y