| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 2 | /* |
| Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 3 | * Copyright (c) 2014-2016 Marcel Ziswiler |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 4 | * |
| Marcel Ziswiler | 764d412 | 2015-08-06 00:47:10 +0200 | [diff] [blame] | 5 | * Configuration settings for the Toradex Apalis T30 modules. |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
| 11 | #include <linux/sizes.h> |
| 12 | |
| 13 | #include "tegra30-common.h" |
| 14 | |
| Marcel Ziswiler | d6cd15f | 2019-09-12 11:12:55 +0200 | [diff] [blame] | 15 | /* |
| 16 | * Board-specific serial config |
| 17 | * |
| 18 | * Apalis UART1: NVIDIA UARTA |
| 19 | * Apalis UART2: NVIDIA UARTD |
| 20 | * Apalis UART3: NVIDIA UARTB |
| 21 | * Apalis UART4: NVIDIA UARTC |
| 22 | */ |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 23 | #define CONFIG_TEGRA_ENABLE_UARTA |
| 24 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE |
| 25 | |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 26 | /* PCI networking support */ |
| Marcel Ziswiler | 0fa8af5 | 2015-03-01 02:05:38 +0100 | [diff] [blame] | 27 | #define CONFIG_E1000_NO_NVM |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 28 | |
| Marcel Ziswiler | a4f0f81 | 2015-03-01 02:05:39 +0100 | [diff] [blame] | 29 | /* Increase console I/O buffer size */ |
| 30 | #undef CONFIG_SYS_CBSIZE |
| 31 | #define CONFIG_SYS_CBSIZE 1024 |
| 32 | |
| 33 | /* Increase arguments buffer size */ |
| 34 | #undef CONFIG_SYS_BARGSIZE |
| 35 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 36 | |
| Marcel Ziswiler | a4f0f81 | 2015-03-01 02:05:39 +0100 | [diff] [blame] | 37 | /* Increase maximum number of arguments */ |
| 38 | #undef CONFIG_SYS_MAXARGS |
| 39 | #define CONFIG_SYS_MAXARGS 32 |
| 40 | |
| Igor Opaniuk | d4b0740 | 2020-03-27 12:15:46 +0200 | [diff] [blame] | 41 | #define UBOOT_UPDATE \ |
| 42 | "uboot_hwpart=1\0" \ |
| 43 | "uboot_blk=0\0" \ |
| 44 | "set_blkcnt=setexpr blkcnt ${filesize} + 0x1ff && " \ |
| 45 | "setexpr blkcnt ${blkcnt} / 0x200\0" \ |
| 46 | "update_uboot=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \ |
| 47 | "mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" \ |
| 48 | |
| 49 | #define BOARD_EXTRA_ENV_SETTINGS \ |
| Igor Opaniuk | 84c1a2d | 2022-04-13 11:33:27 +0200 | [diff] [blame^] | 50 | UBOOT_UPDATE \ |
| 51 | "boot_script_dhcp=boot.scr\0" |
| Igor Opaniuk | d4b0740 | 2020-03-27 12:15:46 +0200 | [diff] [blame] | 52 | |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 53 | #include "tegra-common-post.h" |
| 54 | |
| 55 | #endif /* __CONFIG_H */ |