Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2017 General Electric Company |
| 4 | * |
| 5 | * Based on board/freescale/mx53loco/mx53loco_video.c: |
| 6 | * |
| 7 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 8 | * Fabio Estevam <fabio.estevam@freescale.com> |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 12 | #include <dm.h> |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 13 | #include <linux/list.h> |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 14 | #include <asm/arch/iomux-mx53.h> |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 15 | #include <asm/mach-imx/video.h> |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 16 | #include <linux/fb.h> |
| 17 | #include <ipu_pixfmt.h> |
| 18 | #include <asm/arch/crm_regs.h> |
| 19 | #include <asm/arch/imx-regs.h> |
| 20 | #include <asm/io.h> |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 21 | #include <panel.h> |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 22 | |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 23 | static int detect_lcd(struct display_info_t const *dev) |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 24 | { |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 25 | return 1; |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 26 | } |
| 27 | |
| 28 | static void lcd_enable(void) |
| 29 | { |
| 30 | struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; |
| 31 | struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; |
| 32 | |
| 33 | /* Set LDB_DI0 as clock source for IPU_DI0 */ |
| 34 | clrsetbits_le32(&mxc_ccm->cscmr2, |
| 35 | MXC_CCM_CSCMR2_DI0_CLK_SEL_MASK, |
| 36 | MXC_CCM_CSCMR2_DI0_CLK_SEL( |
| 37 | MXC_CCM_CSCMR2_DI0_CLK_SEL_LDB_DI0_CLK)); |
| 38 | |
| 39 | /* Turn on IPU LDB DI0 clocks */ |
| 40 | setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_LDB_DI0(3)); |
| 41 | |
| 42 | /* Turn on IPU DI0 clocks */ |
| 43 | setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_IPU_DI0(3)); |
| 44 | |
| 45 | /* Configure LDB */ |
| 46 | writel(IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | |
| 47 | IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | |
| 48 | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, |
| 49 | &iomux->gpr[2]); |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 50 | } |
| 51 | |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 52 | static void do_enable_backlight(struct display_info_t const *dev) |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 53 | { |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 54 | struct udevice *panel; |
| 55 | int ret; |
| 56 | |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 57 | lcd_enable(); |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 58 | |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 59 | ret = uclass_get_device(UCLASS_PANEL, 0, &panel); |
| 60 | if (ret) { |
| 61 | printf("Could not find panel: %d\n", ret); |
| 62 | return; |
| 63 | } |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 64 | |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 65 | panel_set_backlight(panel, 100); |
| 66 | panel_enable_backlight(panel); |
| 67 | } |
| 68 | |
| 69 | struct display_info_t const displays[] = { |
| 70 | { |
| 71 | .bus = -1, |
| 72 | .addr = -1, |
| 73 | .pixfmt = IPU_PIX_FMT_RGB24, |
| 74 | .detect = detect_lcd, |
| 75 | .enable = do_enable_backlight, |
| 76 | .mode = { |
| 77 | .name = "NV-SPWGRGB888", |
| 78 | .refresh = 60, |
| 79 | .xres = 800, |
| 80 | .yres = 480, |
| 81 | .pixclock = 15384, |
| 82 | .left_margin = 16, |
| 83 | .right_margin = 210, |
| 84 | .upper_margin = 10, |
| 85 | .lower_margin = 22, |
| 86 | .hsync_len = 30, |
| 87 | .vsync_len = 13, |
| 88 | .sync = FB_SYNC_EXT, |
| 89 | .vmode = FB_VMODE_NONINTERLACED |
| 90 | } |
| 91 | } |
| 92 | }; |
Peter Senna Tschudin | 56d9692 | 2017-11-06 19:14:11 +0000 | [diff] [blame] | 93 | |
Ian Ray | 9e559af | 2020-01-31 15:07:57 +0200 | [diff] [blame] | 94 | size_t display_count = ARRAY_SIZE(displays); |