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Stefano Babicf02e6972011-01-20 08:05:15 +00001/*
2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3 *
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5 *
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7 *
8 * Configuration for the MX35pdk Freescale board.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#include <asm/arch/imx-regs.h>
30
31 /* High Level Configuration Options */
32#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
33#define CONFIG_MX35
34#define CONFIG_MX35_HCLK_FREQ 24000000
35
36#define CONFIG_DISPLAY_CPUINFO
Stefano Babicf02e6972011-01-20 08:05:15 +000037
38/* Set TEXT at the beginning of the NOR flash */
39#define CONFIG_SYS_TEXT_BASE 0xA0000000
Stefano Babic4604aae2012-04-01 03:23:01 +000040#define CONFIG_SYS_CACHELINE_SIZE 32
Stefano Babicf02e6972011-01-20 08:05:15 +000041
Stefano Babicf02e6972011-01-20 08:05:15 +000042#define CONFIG_BOARD_EARLY_INIT_F
Helmut Raigerd5a184b2011-10-20 04:19:47 +000043#define CONFIG_BOARD_LATE_INIT
Stefano Babicf02e6972011-01-20 08:05:15 +000044
45#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_REVISION_TAG
47#define CONFIG_SETUP_MEMORY_TAGS
48#define CONFIG_INITRD_TAG
49
50/*
51 * Size of malloc() pool
52 */
53#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
54
55/*
56 * Hardware drivers
57 */
58#define CONFIG_HARD_I2C
59#define CONFIG_I2C_MXC
Troy Kisky8462c632012-04-24 17:33:25 +000060#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
Stefano Babicf02e6972011-01-20 08:05:15 +000061#define CONFIG_SYS_I2C_SPEED 100000
Stefano Babicf02e6972011-01-20 08:05:15 +000062#define CONFIG_MXC_SPI
Stefano Babic560c1bc2011-08-21 11:00:32 +020063#define CONFIG_MXC_GPIO
Stefano Babicf02e6972011-01-20 08:05:15 +000064
65
66/*
67 * PMIC Configs
68 */
Stefano Babic55615742011-10-06 21:07:42 +020069#define CONFIG_PMIC
70#define CONFIG_PMIC_I2C
71#define CONFIG_PMIC_FSL
Stefano Babicf02e6972011-01-20 08:05:15 +000072#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
Fabio Estevam69517dc2011-10-25 01:35:37 +000073#define CONFIG_RTC_MC13XXX
Stefano Babicf02e6972011-01-20 08:05:15 +000074
75/*
76 * MFD MC9SDZ60
77 */
78#define CONFIG_FSL_MC9SDZ60
79#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
80
81/*
82 * UART (console)
83 */
84#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010085#define CONFIG_MXC_UART_BASE UART1_BASE
Stefano Babicf02e6972011-01-20 08:05:15 +000086
87/* allow to overwrite serial and ethaddr */
88#define CONFIG_ENV_OVERWRITE
89#define CONFIG_CONS_INDEX 1
90#define CONFIG_BAUDRATE 115200
Stefano Babicf02e6972011-01-20 08:05:15 +000091
92/*
93 * Command definition
94 */
95
96#include <config_cmd_default.h>
97
98#define CONFIG_CMD_PING
99#define CONFIG_CMD_DHCP
100#define CONFIG_BOOTP_SUBNETMASK
101#define CONFIG_BOOTP_GATEWAY
102#define CONFIG_BOOTP_DNS
103
104#define CONFIG_CMD_NAND
Stefano Babic4604aae2012-04-01 03:23:01 +0000105#define CONFIG_CMD_CACHE
Stefano Babicf02e6972011-01-20 08:05:15 +0000106
107#define CONFIG_CMD_I2C
108#define CONFIG_CMD_SPI
109#define CONFIG_CMD_MII
110#define CONFIG_CMD_NET
111#define CONFIG_NET_RETRY_COUNT 100
Fabio Estevam69517dc2011-10-25 01:35:37 +0000112#define CONFIG_CMD_DATE
Stefano Babicf02e6972011-01-20 08:05:15 +0000113
114#define CONFIG_BOOTDELAY 3
115
116#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
117
118/*
119 * Ethernet on the debug board (SMC911)
120 */
121#define CONFIG_SMC911X
122#define CONFIG_SMC911X_16_BIT 1
123#define CONFIG_SMC911X_BASE CS5_BASE_ADDR
124
125#define CONFIG_HAS_ETH1
Stefano Babicf02e6972011-01-20 08:05:15 +0000126#define CONFIG_ETHPRIME
127
128/*
129 * Ethernet on SOC (FEC)
130 */
131#define CONFIG_FEC_MXC
132#define IMX_FEC_BASE FEC_BASE_ADDR
133#define CONFIG_FEC_MXC_PHYADDR 0x1F
134
135#define CONFIG_MII
136#define CONFIG_DISCOVER_PHY
137
138#define CONFIG_ARP_TIMEOUT 200UL
139
140/*
141 * Miscellaneous configurable options
142 */
143#define CONFIG_SYS_LONGHELP /* undef to save memory */
144#define CONFIG_SYS_PROMPT "MX35 U-Boot > "
145#define CONFIG_CMDLINE_EDITING
146#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
Stefano Babicf02e6972011-01-20 08:05:15 +0000147
148#define CONFIG_AUTO_COMPLETE
149#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
150/* Print Buffer Size */
151#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
152#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
153#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
154
155#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
156#define CONFIG_SYS_MEMTEST_END 0x10000
157
158#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
159
160#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
161
162#define CONFIG_SYS_HZ 1000
163
164
165/*
166 * Stack sizes
167 *
168 * The stack sizes are set up in start.S using the settings below
169 */
170#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
171
172/*
173 * Physical Memory Map
174 */
Stefano Babic19edc942011-08-02 14:42:36 +0200175#define CONFIG_NR_DRAM_BANKS 2
Stefano Babicf02e6972011-01-20 08:05:15 +0000176#define PHYS_SDRAM_1 CSD0_BASE_ADDR
177#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Stefano Babic19edc942011-08-02 14:42:36 +0200178#define PHYS_SDRAM_2 CSD1_BASE_ADDR
179#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
Stefano Babicf02e6972011-01-20 08:05:15 +0000180
181#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
182#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
183#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
184#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
185 GENERATED_GBL_DATA_SIZE)
186#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
187 CONFIG_SYS_GBL_DATA_OFFSET)
188
189/*
190 * MTD Command for mtdparts
191 */
192#define CONFIG_CMD_MTDPARTS
193#define CONFIG_MTD_DEVICE
194#define CONFIG_FLASH_CFI_MTD
195#define CONFIG_MTD_PARTITIONS
196#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
197#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
198 "96m(root),8m(cfg),1938m(user);" \
199 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
200
201/*
202 * FLASH and environment organization
203 */
204#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
205#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
206#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
207/* Monitor at beginning of flash */
208#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
209#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
210
211#define CONFIG_ENV_SECT_SIZE (128 * 1024)
212#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
213
214/* Address and size of Redundant Environment Sector */
215#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
216#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
217
218#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
219 CONFIG_SYS_MONITOR_LEN)
220
221#define CONFIG_ENV_IS_IN_FLASH
222
223#if defined(CONFIG_FSL_ENV_IN_NAND)
224 #define CONFIG_ENV_IS_IN_NAND
225 #define CONFIG_ENV_OFFSET (1024 * 1024)
226#endif
227
228/*
229 * CFI FLASH driver setup
230 */
231#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
232#define CONFIG_FLASH_CFI_DRIVER
233
234/* A non-standard buffered write algorithm */
235#define CONFIG_FLASH_SPANSION_S29WS_N
236#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
237#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
238
239/*
240 * NAND FLASH driver setup
241 */
242#define CONFIG_NAND_MXC
243#define CONFIG_NAND_MXC_V1_1
244#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
245#define CONFIG_SYS_MAX_NAND_DEVICE 1
246#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
247#define CONFIG_MXC_NAND_HWECC
248#define CONFIG_SYS_NAND_LARGEPAGE
249
250/*
251 * Default environment and default scripts
252 * to update uboot and load kernel
253 */
254#define xstr(s) str(s)
255#define str(s) #s
256
257#define CONFIG_HOSTNAME "mx35pdk"
258#define CONFIG_EXTRA_ENV_SETTINGS \
259 "netdev=eth1\0" \
260 "ethprime=smc911x\0" \
261 "nfsargs=setenv bootargs root=/dev/nfs rw " \
262 "nfsroot=${serverip}:${rootpath}\0" \
263 "ramargs=setenv bootargs root=/dev/ram rw\0" \
264 "addip_sta=setenv bootargs ${bootargs} " \
265 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
266 ":${hostname}:${netdev}:off panic=1\0" \
267 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
268 "addip=if test -n ${ipdyn};then run addip_dyn;" \
269 "else run addip_sta;fi\0" \
270 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
271 "addtty=setenv bootargs ${bootargs}" \
272 " console=ttymxc0,${baudrate}\0" \
273 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
274 "loadaddr=80800000\0" \
275 "kernel_addr_r=80800000\0" \
276 "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
277 "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
278 "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \
279 "flash_self=run ramargs addip addtty addmtd addmisc;" \
280 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
281 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
282 "bootm ${kernel_addr}\0" \
283 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
284 "run nfsargs addip addtty addmtd addmisc;" \
285 "bootm ${kernel_addr_r}\0" \
286 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
287 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
288 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
289 "load=tftp ${loadaddr} ${u-boot}\0" \
290 "uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0" \
291 "update=protect off ${uboot_addr} +40000;" \
292 "erase ${uboot_addr} +40000;" \
293 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
294 "upd=if run load;then echo Updating u-boot;if run update;" \
295 "then echo U-Boot updated;" \
296 "else echo Error updating u-boot !;" \
297 "echo Board without bootloader !!;" \
298 "fi;" \
299 "else echo U-Boot not downloaded..exiting;fi\0" \
300 "bootcmd=run net_nfs\0"
301
302#endif /* __CONFIG_H */