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git01.mediatek.com / filogic / uboot / 8445130590bae3bb688a1817df9f6eaaafdea659 / . / drivers / usb / r8a66597-hcd.c
blob: 288f41a8b83adbf8bac9c8129516931ace8c1b88 [file] [log] [blame]
Yoshihiro Shimodaf66d9982008-07-09 21:07:38 +0900[diff] [blame]1/*
2 * R8A66597 HCD (Host Controller Driver) for u-boot
3 *
4 * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 *
19 */
20
21#include <common.h>
22#include <usb.h>
23#include <asm/io.h>
24
25#include "r8a66597.h"
26
Yoshihiro Shimodaf66d9982008-07-09 21:07:38 +0900[diff] [blame]27#ifdef R8A66597_DEBUG
28#define R8A66597_DPRINT printf
29#else
30#define R8A66597_DPRINT(...)
31#endif
32
33static const char hcd_name[] = "r8a66597_hcd";
34static unsigned short clock = CONFIG_R8A66597_XTAL;
35static unsigned short vif = CONFIG_R8A66597_LDRV;
36static unsigned short endian = CONFIG_R8A66597_ENDIAN;
37static struct r8a66597 gr8a66597;
38
39static void set_devadd_reg(struct r8a66597 *r8a66597, u8 r8a66597_address,
40 u16 usbspd, u8 upphub, u8 hubport, int port)
41{
42 u16 val;
43 unsigned long devadd_reg = get_devadd_addr(r8a66597_address);
44
45 val = (upphub << 11) | (hubport << 8) | (usbspd << 6) | (port & 0x0001);
46 r8a66597_write(r8a66597, val, devadd_reg);
47}
48
49static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
50{
51 u16 tmp;
52 int i = 0;
53
54#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
55 do {
56 r8a66597_write(r8a66597, SCKE, SYSCFG0);
57 tmp = r8a66597_read(r8a66597, SYSCFG0);
58 if (i++ > 1000) {
59 printf("register access fail.\n");
60 return -1;
61 }
62 } while ((tmp & SCKE) != SCKE);
63 r8a66597_write(r8a66597, 0x04, 0x02);
64#else
65 do {
66 r8a66597_write(r8a66597, USBE, SYSCFG0);
67 tmp = r8a66597_read(r8a66597, SYSCFG0);
68 if (i++ > 1000) {
69 printf("register access fail.\n");
70 return -1;
71 }
72 } while ((tmp & USBE) != USBE);
73 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
74 r8a66597_mdfy(r8a66597, clock, XTAL, SYSCFG0);
75
76 i = 0;
77 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
78 do {
79 udelay(1000);
80 tmp = r8a66597_read(r8a66597, SYSCFG0);
81 if (i++ > 500) {
82 printf("register access fail.\n");
83 return -1;
84 }
85 } while ((tmp & SCKE) != SCKE);
86#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
87
88 return 0;
89}
90
91static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
92{
93 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
94 udelay(1);
95#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
96 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
97 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
98 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
99#endif
100}
101
102static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
103{
104 u16 val;
105
106 val = port ? DRPD : DCFM | DRPD;
107 r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
108 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
109
110 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
111}
112
113static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
114{
115 u16 val, tmp;
116
117 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
118 r8a66597_write(r8a66597, 0, get_intsts_reg(port));
119
120 r8a66597_port_power(r8a66597, port, 0);
121
122 do {
123 tmp = r8a66597_read(r8a66597, SOFCFG) & EDGESTS;
124 udelay(640);
125 } while (tmp == EDGESTS);
126
127 val = port ? DRPD : DCFM | DRPD;
128 r8a66597_bclr(r8a66597, val, get_syscfg_reg(port));
129 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
130}
131
132static int enable_controller(struct r8a66597 *r8a66597)
133{
134 int ret, port;
135
136 ret = r8a66597_clock_enable(r8a66597);
137 if (ret < 0)
138 return ret;
139
140 r8a66597_bset(r8a66597, vif & LDRV, PINCFG);
141 r8a66597_bset(r8a66597, USBE, SYSCFG0);
142
143 r8a66597_bset(r8a66597, INTL, SOFCFG);
144 r8a66597_write(r8a66597, 0, INTENB0);
145 r8a66597_write(r8a66597, 0, INTENB1);
146 r8a66597_write(r8a66597, 0, INTENB2);
147
148 r8a66597_bset(r8a66597, endian & BIGEND, CFIFOSEL);
149 r8a66597_bset(r8a66597, endian & BIGEND, D0FIFOSEL);
150 r8a66597_bset(r8a66597, endian & BIGEND, D1FIFOSEL);
151 r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
152
153 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
154 r8a66597_enable_port(r8a66597, port);
155
156 return 0;
157}
158
159static void disable_controller(struct r8a66597 *r8a66597)
160{
161 int i;
162
163 if (!(r8a66597_read(r8a66597, SYSCFG0) & USBE))
164 return;
165
166 r8a66597_write(r8a66597, 0, INTENB0);
167 r8a66597_write(r8a66597, 0, INTSTS0);
168
169 r8a66597_write(r8a66597, 0, D0FIFOSEL);
170 r8a66597_write(r8a66597, 0, D1FIFOSEL);
171 r8a66597_write(r8a66597, 0, DCPCFG);
172 r8a66597_write(r8a66597, 0x40, DCPMAXP);
173 r8a66597_write(r8a66597, 0, DCPCTR);
174
175 for (i = 0; i <= 10; i++)
176 r8a66597_write(r8a66597, 0, get_devadd_addr(i));
177 for (i = 1; i <= 5; i++) {
178 r8a66597_write(r8a66597, 0, get_pipetre_addr(i));
179 r8a66597_write(r8a66597, 0, get_pipetrn_addr(i));
180 }
181 for (i = 1; i < R8A66597_MAX_NUM_PIPE; i++) {
182 r8a66597_write(r8a66597, 0, get_pipectr_addr(i));
183 r8a66597_write(r8a66597, i, PIPESEL);
184 r8a66597_write(r8a66597, 0, PIPECFG);
185 r8a66597_write(r8a66597, 0, PIPEBUF);
186 r8a66597_write(r8a66597, 0, PIPEMAXP);
187 r8a66597_write(r8a66597, 0, PIPEPERI);
188 }
189
190 for (i = 0; i < R8A66597_MAX_ROOT_HUB; i++)
191 r8a66597_disable_port(r8a66597, i);
192
193 r8a66597_clock_disable(r8a66597);
194}
195
196static void r8a66597_reg_wait(struct r8a66597 *r8a66597, unsigned long reg,
197 u16 mask, u16 loop)
198{
199 u16 tmp;
200 int i = 0;
201
202 do {
203 tmp = r8a66597_read(r8a66597, reg);
204 if (i++ > 1000000) {
205 printf("register%lx, loop %x is timeout\n", reg, loop);
206 break;
207 }
208 } while ((tmp & mask) != loop);
209}
210
211static void pipe_buffer_setting(struct r8a66597 *r8a66597,
212 struct usb_device *dev, unsigned long pipe)
213{
214 u16 val = 0;
215 u16 pipenum, bufnum, maxpacket;
216
217 if (usb_pipein(pipe)) {
218 pipenum = BULK_IN_PIPENUM;
219 bufnum = BULK_IN_BUFNUM;
220 maxpacket = dev->epmaxpacketin[usb_pipeendpoint(pipe)];
221 } else {
222 pipenum = BULK_OUT_PIPENUM;
223 bufnum = BULK_OUT_BUFNUM;
224 maxpacket = dev->epmaxpacketout[usb_pipeendpoint(pipe)];
225 }
226
227 if (r8a66597->pipe_config & (1 << pipenum))
228 return;
229 r8a66597->pipe_config |= (1 << pipenum);
230
231 r8a66597_bset(r8a66597, ACLRM, get_pipectr_addr(pipenum));
232 r8a66597_bclr(r8a66597, ACLRM, get_pipectr_addr(pipenum));
233 r8a66597_write(r8a66597, pipenum, PIPESEL);
234
235 /* FIXME: This driver support bulk transfer only. */
236 if (!usb_pipein(pipe))
237 val |= R8A66597_DIR;
238 else
239 val |= R8A66597_SHTNAK;
240 val |= R8A66597_BULK | R8A66597_DBLB | usb_pipeendpoint(pipe);
241 r8a66597_write(r8a66597, val, PIPECFG);
242
243 r8a66597_write(r8a66597, (8 << 10) | bufnum, PIPEBUF);
244 r8a66597_write(r8a66597, make_devsel(usb_pipedevice(pipe)) |
245 maxpacket, PIPEMAXP);
246 r8a66597_write(r8a66597, 0, PIPEPERI);
247 r8a66597_write(r8a66597, SQCLR, get_pipectr_addr(pipenum));
248}
249
250static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
251 struct devrequest *setup)
252{
253 int i;
254 unsigned short *p = (unsigned short *)setup;
255 unsigned long setup_addr = USBREQ;
256 u16 intsts1;
257 int timeout = 3000;
258 u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
259
260 r8a66597_write(r8a66597, make_devsel(devsel) |
261 (8 << dev->maxpacketsize), DCPMAXP);
262 r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
263
264 for (i = 0; i < 4; i++) {
265 r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
266 setup_addr += 2;
267 }
268 r8a66597_write(r8a66597, ~0x0001, BRDYSTS);
269 r8a66597_write(r8a66597, SUREQ, DCPCTR);
270
271 while (1) {
272 intsts1 = r8a66597_read(r8a66597, INTSTS1);
273 if (intsts1 & SACK)
274 break;
275 if (intsts1 & SIGN) {
276 printf("setup packet send error\n");
277 return -1;
278 }
279 if (timeout-- < 0) {
280 printf("setup packet timeout\n");
281 return -1;
282 }
283 udelay(500);
284 }
285
286 return 0;
287}
288
289static int send_bulk_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
290 unsigned long pipe, void *buffer, int transfer_len)
291{
292 u16 tmp, bufsize;
293 u16 *buf;
294 size_t size;
295
296 R8A66597_DPRINT("%s\n", __func__);
297
298 r8a66597_mdfy(r8a66597, MBW | BULK_OUT_PIPENUM,
299 MBW | CURPIPE, CFIFOSEL);
300 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, BULK_OUT_PIPENUM);
301 tmp = r8a66597_read(r8a66597, CFIFOCTR);
302 if ((tmp & FRDY) == 0) {
303 printf("%s FRDY is not set (%x)\n", __func__, tmp);
304 return -1;
305 }
306
307 /* prepare parameters */
308 bufsize = dev->epmaxpacketout[usb_pipeendpoint(pipe)];
309 buf = (u16 *)(buffer + dev->act_len);
310 size = min((int)bufsize, transfer_len - dev->act_len);
311
312 /* write fifo */
313 r8a66597_write(r8a66597, ~(1 << BULK_OUT_PIPENUM), BEMPSTS);
314 if (buffer) {
315 r8a66597_write_fifo(r8a66597, CFIFO, buf, size);
316 r8a66597_write(r8a66597, BVAL, CFIFOCTR);
317 }
318
319 /* update parameters */
320 dev->act_len += size;
321
322 r8a66597_mdfy(r8a66597, PID_BUF, PID,
323 get_pipectr_addr(BULK_OUT_PIPENUM));
324
325 while (!(r8a66597_read(r8a66597, BEMPSTS) & (1 << BULK_OUT_PIPENUM)))
326 if (ctrlc())
327 return -1;
328 r8a66597_write(r8a66597, ~(1 << BULK_OUT_PIPENUM), BEMPSTS);
329
330 if (dev->act_len >= transfer_len)
331 r8a66597_mdfy(r8a66597, PID_NAK, PID,
332 get_pipectr_addr(BULK_OUT_PIPENUM));
333
334 return 0;
335}
336
337static int receive_bulk_packet(struct r8a66597 *r8a66597,
338 struct usb_device *dev,
339 unsigned long pipe,
340 void *buffer, int transfer_len)
341{
342 u16 tmp;
343 u16 *buf;
344 const u16 pipenum = BULK_IN_PIPENUM;
345 int rcv_len;
346 int maxpacket = dev->epmaxpacketin[usb_pipeendpoint(pipe)];
347
348 R8A66597_DPRINT("%s\n", __func__);
349
350 /* prepare */
351 if (dev->act_len == 0) {
352 r8a66597_mdfy(r8a66597, PID_NAK, PID,
353 get_pipectr_addr(pipenum));
354 r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
355
356 r8a66597_write(r8a66597, TRCLR, get_pipetre_addr(pipenum));
357 r8a66597_write(r8a66597,
358 (transfer_len + maxpacket - 1) / maxpacket,
359 get_pipetrn_addr(pipenum));
360 r8a66597_bset(r8a66597, TRENB, get_pipetre_addr(pipenum));
361
362 r8a66597_mdfy(r8a66597, PID_BUF, PID,
363 get_pipectr_addr(pipenum));
364 }
365
366 r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL);
367 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
368
369 while (!(r8a66597_read(r8a66597, BRDYSTS) & (1 << pipenum)))
370 if (ctrlc())
371 return -1;
372 r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
373
374 tmp = r8a66597_read(r8a66597, CFIFOCTR);
375 if ((tmp & FRDY) == 0) {
376 printf("%s FRDY is not set. (%x)\n", __func__, tmp);
377 return -1;
378 }
379
380 buf = (u16 *)(buffer + dev->act_len);
381 rcv_len = tmp & DTLN;
382 dev->act_len += rcv_len;
383
384 if (buffer) {
385 if (rcv_len == 0)
386 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
387 else
388 r8a66597_read_fifo(r8a66597, CFIFO, buf, rcv_len);
389 }
390
391 return 0;
392}
393
394static int receive_control_packet(struct r8a66597 *r8a66597,
395 struct usb_device *dev,
396 void *buffer, int transfer_len)
397{
398 u16 tmp;
399 int rcv_len;
400
401 /* FIXME: limit transfer size : 64byte or less */
402
403 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
404 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
405 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
406 r8a66597_bset(r8a66597, SQSET, DCPCTR);
407 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
408 r8a66597_mdfy(r8a66597, PID_BUF, PID, DCPCTR);
409
410 while (!(r8a66597_read(r8a66597, BRDYSTS) & 0x0001))
411 if (ctrlc())
412 return -1;
413 r8a66597_write(r8a66597, ~0x0001, BRDYSTS);
414
415 r8a66597_mdfy(r8a66597, MBW, MBW | CURPIPE, CFIFOSEL);
416 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
417
418 tmp = r8a66597_read(r8a66597, CFIFOCTR);
419 if ((tmp & FRDY) == 0) {
420 printf("%s FRDY is not set. (%x)\n", __func__, tmp);
421 return -1;
422 }
423
424 rcv_len = tmp & DTLN;
425 dev->act_len += rcv_len;
426
427 r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
428
429 if (buffer) {
430 if (rcv_len == 0)
431 r8a66597_write(r8a66597, BCLR, DCPCTR);
432 else
433 r8a66597_read_fifo(r8a66597, CFIFO, buffer, rcv_len);
434 }
435
436 return 0;
437}
438
439static int send_status_packet(struct r8a66597 *r8a66597,
440 unsigned long pipe)
441{
442 r8a66597_bset(r8a66597, SQSET, DCPCTR);
443 r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
444
445 if (usb_pipein(pipe)) {
446 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
447 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
448 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
449 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
450 r8a66597_write(r8a66597, BCLR | BVAL, CFIFOCTR);
451 } else {
452 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
453 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
454 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
455 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
456 }
457 r8a66597_mdfy(r8a66597, PID_BUF, PID, DCPCTR);
458
459 while (!(r8a66597_read(r8a66597, BEMPSTS) & 0x0001))
460 if (ctrlc())
461 return -1;
462
463 return 0;
464}
465
466static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port)
467{
468 int count = R8A66597_MAX_SAMPLING;
469 unsigned short syssts, old_syssts;
470
471 R8A66597_DPRINT("%s\n", __func__);
472
473 old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port) & LNST);
474 while (count > 0) {
475 wait_ms(R8A66597_RH_POLL_TIME);
476
477 syssts = r8a66597_read(r8a66597, get_syssts_reg(port) & LNST);
478 if (syssts == old_syssts) {
479 count--;
480 } else {
481 count = R8A66597_MAX_SAMPLING;
482 old_syssts = syssts;
483 }
484 }
485}
486
487static void r8a66597_bus_reset(struct r8a66597 *r8a66597, int port)
488{
489 wait_ms(10);
490 r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT, get_dvstctr_reg(port));
491 wait_ms(50);
492 r8a66597_mdfy(r8a66597, UACT, USBRST | UACT, get_dvstctr_reg(port));
493 wait_ms(50);
494}
495
496static int check_usb_device_connecting(struct r8a66597 *r8a66597)
497{
498 int timeout = 10000; /* 100usec * 10000 = 1sec */
499 int i;
500
501 for (i = 0; i < 5; i++) {
502 /* check a usb cable connect */
503 while (!(r8a66597_read(r8a66597, INTSTS1) & ATTCH)) {
504 if (timeout-- < 0) {
505 printf("%s timeout.\n", __func__);
506 return -1;
507 }
508 udelay(100);
509 }
510
511 /* check a data line */
512 r8a66597_check_syssts(r8a66597, 0);
513
514 r8a66597_bus_reset(r8a66597, 0);
515 r8a66597->speed = get_rh_usb_speed(r8a66597, 0);
516
517 if (!(r8a66597_read(r8a66597, INTSTS1) & DTCH)) {
518 r8a66597->port_change = USB_PORT_STAT_C_CONNECTION;
519 r8a66597->port_status = USB_PORT_STAT_CONNECTION |
520 USB_PORT_STAT_ENABLE;
521 return 0; /* success */
522 }
523
524 R8A66597_DPRINT("USB device has detached. retry = %d\n", i);
525 r8a66597_write(r8a66597, ~DTCH, INTSTS1);
526 }
527
528 return -1; /* fail */
529}
530
531/* based on usb_ohci.c */
532#define min_t(type, x, y) \
Nobuhiro Iwamatsu9d58a012008-09-18 20:13:08 +0900[diff] [blame]533 ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
Yoshihiro Shimodaf66d9982008-07-09 21:07:38 +0900[diff] [blame]534/*-------------------------------------------------------------------------*
535 * Virtual Root Hub
536 *-------------------------------------------------------------------------*/
537
538/* Device descriptor */
539static __u8 root_hub_dev_des[] =
540{
541 0x12, /* __u8 bLength; */
542 0x01, /* __u8 bDescriptorType; Device */
543 0x10, /* __u16 bcdUSB; v1.1 */
544 0x01,
545 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
546 0x00, /* __u8 bDeviceSubClass; */
547 0x00, /* __u8 bDeviceProtocol; */
548 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
549 0x00, /* __u16 idVendor; */
550 0x00,
551 0x00, /* __u16 idProduct; */
552 0x00,
553 0x00, /* __u16 bcdDevice; */
554 0x00,
555 0x00, /* __u8 iManufacturer; */
556 0x01, /* __u8 iProduct; */
557 0x00, /* __u8 iSerialNumber; */
558 0x01 /* __u8 bNumConfigurations; */
559};
560
561/* Configuration descriptor */
562static __u8 root_hub_config_des[] =
563{
564 0x09, /* __u8 bLength; */
565 0x02, /* __u8 bDescriptorType; Configuration */
566 0x19, /* __u16 wTotalLength; */
567 0x00,
568 0x01, /* __u8 bNumInterfaces; */
569 0x01, /* __u8 bConfigurationValue; */
570 0x00, /* __u8 iConfiguration; */
571 0x40, /* __u8 bmAttributes; */
572
573 0x00, /* __u8 MaxPower; */
574
575 /* interface */
576 0x09, /* __u8 if_bLength; */
577 0x04, /* __u8 if_bDescriptorType; Interface */
578 0x00, /* __u8 if_bInterfaceNumber; */
579 0x00, /* __u8 if_bAlternateSetting; */
580 0x01, /* __u8 if_bNumEndpoints; */
581 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
582 0x00, /* __u8 if_bInterfaceSubClass; */
583 0x00, /* __u8 if_bInterfaceProtocol; */
584 0x00, /* __u8 if_iInterface; */
585
586 /* endpoint */
587 0x07, /* __u8 ep_bLength; */
588 0x05, /* __u8 ep_bDescriptorType; Endpoint */
589 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
590 0x03, /* __u8 ep_bmAttributes; Interrupt */
591 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
592 0x00,
593 0xff /* __u8 ep_bInterval; 255 ms */
594};
595
596static unsigned char root_hub_str_index0[] =
597{
598 0x04, /* __u8 bLength; */
599 0x03, /* __u8 bDescriptorType; String-descriptor */
600 0x09, /* __u8 lang ID */
601 0x04, /* __u8 lang ID */
602};
603
604static unsigned char root_hub_str_index1[] =
605{
606 34, /* __u8 bLength; */
607 0x03, /* __u8 bDescriptorType; String-descriptor */
608 'R', /* __u8 Unicode */
609 0, /* __u8 Unicode */
610 '8', /* __u8 Unicode */
611 0, /* __u8 Unicode */
612 'A', /* __u8 Unicode */
613 0, /* __u8 Unicode */
614 '6', /* __u8 Unicode */
615 0, /* __u8 Unicode */
616 '6', /* __u8 Unicode */
617 0, /* __u8 Unicode */
618 '5', /* __u8 Unicode */
619 0, /* __u8 Unicode */
620 '9', /* __u8 Unicode */
621 0, /* __u8 Unicode */
622 '7', /* __u8 Unicode */
623 0, /* __u8 Unicode */
624 ' ', /* __u8 Unicode */
625 0, /* __u8 Unicode */
626 'R', /* __u8 Unicode */
627 0, /* __u8 Unicode */
628 'o', /* __u8 Unicode */
629 0, /* __u8 Unicode */
630 'o', /* __u8 Unicode */
631 0, /* __u8 Unicode */
632 't', /* __u8 Unicode */
633 0, /* __u8 Unicode */
634 'H', /* __u8 Unicode */
635 0, /* __u8 Unicode */
636 'u', /* __u8 Unicode */
637 0, /* __u8 Unicode */
638 'b', /* __u8 Unicode */
639 0, /* __u8 Unicode */
640};
641
642static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
643 void *buffer, int transfer_len, struct devrequest *cmd)
644{
645 struct r8a66597 *r8a66597 = &gr8a66597;
646 int leni = transfer_len;
647 int len = 0;
648 int stat = 0;
649 __u16 bmRType_bReq;
650 __u16 wValue;
651 __u16 wIndex;
652 __u16 wLength;
653 unsigned char data[32];
654
655 R8A66597_DPRINT("%s\n", __func__);
656
Remy Bohmerd8c55ab2008-10-10 10:23:22 +0200[diff] [blame]657 if (usb_pipeint(pipe)) {
Yoshihiro Shimodaf66d9982008-07-09 21:07:38 +0900[diff] [blame]658 printf("Root-Hub submit IRQ: NOT implemented");
659 return 0;
660 }
661
662 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
663 wValue = cpu_to_le16 (cmd->value);
664 wIndex = cpu_to_le16 (cmd->index);
665 wLength = cpu_to_le16 (cmd->length);
666
667 switch (bmRType_bReq) {
668 case RH_GET_STATUS:
669 *(__u16 *)buffer = cpu_to_le16(1);
670 len = 2;
671 break;
672 case RH_GET_STATUS | RH_INTERFACE:
673 *(__u16 *)buffer = cpu_to_le16(0);
674 len = 2;
675 break;
676 case RH_GET_STATUS | RH_ENDPOINT:
677 *(__u16 *)buffer = cpu_to_le16(0);
678 len = 2;
679 break;
680 case RH_GET_STATUS | RH_CLASS:
681 *(__u32 *)buffer = cpu_to_le32(0);
682 len = 4;
683 break;
684 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
685 *(__u32 *)buffer = cpu_to_le32(r8a66597->port_status |
686 (r8a66597->port_change << 16));
687 len = 4;
688 break;
689 case RH_CLEAR_FEATURE | RH_ENDPOINT:
690 case RH_CLEAR_FEATURE | RH_CLASS:
691 break;
692
693 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
694 switch (wValue) {
695 case RH_C_PORT_CONNECTION:
696 r8a66597->port_change &= ~USB_PORT_STAT_C_CONNECTION;
697 break;
698 }
699 break;
700
701 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
702 switch (wValue) {
703 case (RH_PORT_SUSPEND):
704 break;
705 case (RH_PORT_RESET):
706 r8a66597_bus_reset(r8a66597, 0);
707 break;
708 case (RH_PORT_POWER):
709 break;
710 case (RH_PORT_ENABLE):
711 break;
712 }
713 break;
714 case RH_SET_ADDRESS:
715 gr8a66597.rh_devnum = wValue;
716 break;
717 case RH_GET_DESCRIPTOR:
718 switch ((wValue & 0xff00) >> 8) {
719 case (0x01): /* device descriptor */
720 len = min_t(unsigned int,
721 leni,
722 min_t(unsigned int,
723 sizeof(root_hub_dev_des),
724 wLength));
725 memcpy(buffer, root_hub_dev_des, len);
726 break;
727 case (0x02): /* configuration descriptor */
728 len = min_t(unsigned int,
729 leni,
730 min_t(unsigned int,
731 sizeof(root_hub_config_des),
732 wLength));
733 memcpy(buffer, root_hub_config_des, len);
734 break;
735 case (0x03): /* string descriptors */
736 if (wValue == 0x0300) {
737 len = min_t(unsigned int,
738 leni,
739 min_t(unsigned int,
740 sizeof(root_hub_str_index0),
741 wLength));
742 memcpy(buffer, root_hub_str_index0, len);
743 }
744 if (wValue == 0x0301) {
745 len = min_t(unsigned int,
746 leni,
747 min_t(unsigned int,
748 sizeof(root_hub_str_index1),
749 wLength));
750 memcpy(buffer, root_hub_str_index1, len);
751 }
752 break;
753 default:
754 stat = USB_ST_STALLED;
755 }
756 break;
757
758 case RH_GET_DESCRIPTOR | RH_CLASS:
759 {
760 __u32 temp = 0x00000001;
761
762 data[0] = 9; /* min length; */
763 data[1] = 0x29;
764 data[2] = temp & RH_A_NDP;
765 data[3] = 0;
766 if (temp & RH_A_PSM)
767 data[3] |= 0x1;
768 if (temp & RH_A_NOCP)
769 data[3] |= 0x10;
770 else if (temp & RH_A_OCPM)
771 data[3] |= 0x8;
772
773 /* corresponds to data[4-7] */
774 data[5] = (temp & RH_A_POTPGT) >> 24;
775 data[7] = temp & RH_B_DR;
776 if (data[2] < 7) {
777 data[8] = 0xff;
778 } else {
779 data[0] += 2;
780 data[8] = (temp & RH_B_DR) >> 8;
781 data[10] = data[9] = 0xff;
782 }
783
784 len = min_t(unsigned int, leni,
785 min_t(unsigned int, data[0], wLength));
786 memcpy(buffer, data, len);
787 break;
788 }
789
790 case RH_GET_CONFIGURATION:
791 *(__u8 *) buffer = 0x01;
792 len = 1;
793 break;
794 case RH_SET_CONFIGURATION:
795 break;
796 default:
Nobuhiro Iwamatsu9d58a012008-09-18 20:13:08 +0900[diff] [blame]797 R8A66597_DPRINT("unsupported root hub command");
Yoshihiro Shimodaf66d9982008-07-09 21:07:38 +0900[diff] [blame]798 stat = USB_ST_STALLED;
799 }
800
801 wait_ms(1);
802
803 len = min_t(int, len, leni);
804
805 dev->act_len = len;
806 dev->status = stat;
807
808 return stat;
809}
810
811int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
812 int transfer_len)
813{
814 struct r8a66597 *r8a66597 = &gr8a66597;
815 int ret = 0;
816
817 R8A66597_DPRINT("%s\n", __func__);
818 R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
819 pipe, buffer, transfer_len, dev->devnum);
820
821 set_devadd_reg(r8a66597, dev->devnum, r8a66597->speed, 0, 0, 0);
822
823 pipe_buffer_setting(r8a66597, dev, pipe);
824
825 dev->act_len = 0;
826 while (dev->act_len < transfer_len && ret == 0) {
827 if (ctrlc())
828 return -1;
829
830 if (usb_pipein(pipe))
831 ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
832 transfer_len);
833 else
834 ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
835 transfer_len);
836 }
837
838 if (ret == 0)
839 dev->status = 0;
840
841 return ret;
842}
843
844int submit_control_msg(struct usb_device *dev, unsigned long pipe,
845 void *buffer, int transfer_len, struct devrequest *setup)
846{
847 struct r8a66597 *r8a66597 = &gr8a66597;
848 u16 r8a66597_address = setup->request == USB_REQ_SET_ADDRESS ?
849 0 : dev->devnum;
850
851 R8A66597_DPRINT("%s\n", __func__);
852 if (usb_pipedevice(pipe) == r8a66597->rh_devnum)
853 return r8a66597_submit_rh_msg(dev, pipe, buffer, transfer_len,
854 setup);
855
856 R8A66597_DPRINT("%s: setup\n", __func__);
857 set_devadd_reg(r8a66597, r8a66597_address, r8a66597->speed, 0, 0, 0);
858
859 if (send_setup_packet(r8a66597, dev, setup) < 0) {
860 printf("setup packet send error\n");
861 return -1;
862 }
863
864 if (usb_pipein(pipe))
865 if (receive_control_packet(r8a66597, dev, buffer,
866 transfer_len) < 0)
867 return -1;
868
869 if (send_status_packet(r8a66597, pipe) < 0)
870 return -1;
871
872 dev->status = 0;
873
874 return 0;
875}
876
877int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
878 int transfer_len, int interval)
879{
880 /* no implement */
881 R8A66597_DPRINT("%s\n", __func__);
882 return 0;
883}
884
885void usb_event_poll(void)
886{
887 /* no implement */
888 R8A66597_DPRINT("%s\n", __func__);
889}
890
891int usb_lowlevel_init(void)
892{
893 struct r8a66597 *r8a66597 = &gr8a66597;
894
895 R8A66597_DPRINT("%s\n", __func__);
896
897 memset(r8a66597, 0, sizeof(r8a66597));
898 r8a66597->reg = CONFIG_R8A66597_BASE_ADDR;
899
900 disable_controller(r8a66597);
901 wait_ms(100);
902
903 enable_controller(r8a66597);
904 r8a66597_port_power(r8a66597, 0 , 1);
905
906 /* check usb device */
907 check_usb_device_connecting(r8a66597);
908
909 wait_ms(50);
910
911 return 0;
912}
913
914int usb_lowlevel_stop(void)
915{
916 disable_controller(&gr8a66597);
917
918 return 0;
919}