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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
5 select CPU_V7
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
18 select CPU_V7
19 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
27 select CPU_V7
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
32 select SPL_PINCTRL
33 select SPL_REGMAP
34 select SPL_SYSCON
35 select SPL_RAM
36 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020037 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020038 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010039 select ROCKCHIP_BROM_HELPER
40 help
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
46
Kever Yang57d4dbf2017-06-23 17:17:52 +080047config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
49 select CPU_V7
50 select SUPPORT_SPL
51 select SPL
52 select ROCKCHIP_BROM_HELPER
53 select DEBUG_UART_BOARD_INIT
54 help
55 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
56 including NEON and GPU, Mali-400 graphics, several DDR3 options
57 and video codec support. Peripherals include Gigabit Ethernet,
58 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
59
Simon Glass2cffe662015-08-30 16:55:38 -060060config ROCKCHIP_RK3288
61 bool "Support Rockchip RK3288"
Andreas Färber6c427032016-07-14 05:09:26 +020062 select CPU_V7
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080063 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080064 select SUPPORT_SPL
65 select SPL
Eddie Caib3501fe2017-12-15 08:17:13 +080066 imply USB_FUNCTION_ROCKUSB
67 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060068 help
69 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
70 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
71 video interfaces supporting HDMI and eDP, several DDR3 options
72 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +010073 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -060074
Jagan Tekie5df8342018-02-23 13:13:10 +053075if ROCKCHIP_RK3288
76
77config TPL_LDSCRIPT
78 default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
79
80endif
81
Kever Yangec02b3c2017-02-23 15:37:51 +080082config ROCKCHIP_RK3328
83 bool "Support Rockchip RK3328"
84 select ARM64
85 help
86 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
87 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
88 video interfaces supporting HDMI and eDP, several DDR3 options
89 and video codec support. Peripherals include Gigabit Ethernet,
90 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
91
Andreas Färber9e3ad682017-05-15 17:51:18 +080092config ROCKCHIP_RK3368
93 bool "Support Rockchip RK3368"
94 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +020095 select SUPPORT_SPL
96 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +020097 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
98 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +020099 imply SPL_SEPARATE_BSS
100 imply SPL_SERIAL_SUPPORT
101 imply TPL_SERIAL_SUPPORT
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200102 select DEBUG_UART_BOARD_INIT
Andreas Färber9e3ad682017-05-15 17:51:18 +0800103 select SYS_NS16550
104 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200105 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
106 into a big and little cluster with 4 cores each) Cortex-A53 including
107 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
108 (for the little cluster), PowerVR G6110 based graphics, one video
109 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
110 video codec support.
111
112 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
113 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800114
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200115if ROCKCHIP_RK3368
116
117config TPL_LDSCRIPT
118 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
119
Philipp Tomsich7d1319b2017-07-28 20:20:41 +0200120config TPL_TEXT_BASE
121 default 0xff8c1000
122
123config TPL_MAX_SIZE
124 default 28672
125
126config TPL_STACK
127 default 0xff8cffff
128
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200129endif
130
Kever Yang0d3d7832016-07-19 21:16:59 +0800131config ROCKCHIP_RK3399
132 bool "Support Rockchip RK3399"
133 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800134 select SUPPORT_SPL
135 select SPL
136 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200137 select SPL_SERIAL_SUPPORT
138 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich41029e62017-04-01 12:59:25 +0200139 select DEBUG_UART_BOARD_INIT
Andy Yan70378cb2017-10-11 15:00:16 +0800140 select BOARD_LATE_INIT
Andy Yand2349d92017-10-11 15:00:49 +0800141 select ROCKCHIP_BROM_HELPER
Kever Yang0d3d7832016-07-19 21:16:59 +0800142 help
143 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
144 and quad-core Cortex-A53.
145 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
146 video interfaces supporting HDMI and eDP, several DDR3 options
147 and video codec support. Peripherals include Gigabit Ethernet,
148 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
149
Andy Yan2d982da2017-06-01 18:00:55 +0800150config ROCKCHIP_RV1108
151 bool "Support Rockchip RV1108"
152 select CPU_V7
153 help
154 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
155 and a DSP.
156
Philipp Tomsich798370f2017-06-29 11:21:15 +0200157config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800158 bool "SPL returns to bootrom"
159 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100160 select ROCKCHIP_BROM_HELPER
Philipp Tomsich798370f2017-06-29 11:21:15 +0200161 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800162 help
163 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
164 SPL will return to the boot rom, which will then load the U-Boot
165 binary to keep going on.
166
Philipp Tomsich798370f2017-06-29 11:21:15 +0200167config TPL_ROCKCHIP_BACK_TO_BROM
168 bool "TPL returns to bootrom"
169 default y if ROCKCHIP_RK3368
170 select ROCKCHIP_BROM_HELPER
171 depends on TPL
172 help
173 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
174 SPL will return to the boot rom, which will then load the U-Boot
175 binary to keep going on.
176
Andy Yan70378cb2017-10-11 15:00:16 +0800177config ROCKCHIP_BOOT_MODE_REG
178 hex "Rockchip boot mode flag register address"
179 default 0x200081c8 if ROCKCHIP_RK3036
180 default 0x20004040 if ROCKCHIP_RK3188
181 default 0x110005c8 if ROCKCHIP_RK322X
182 default 0xff730094 if ROCKCHIP_RK3288
183 default 0xff738200 if ROCKCHIP_RK3368
184 default 0xff320300 if ROCKCHIP_RK3399
185 default 0x10300580 if ROCKCHIP_RV1108
186 default 0
187 help
188 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
189 according to the value from this register.
190
Kever Yange484f772017-04-20 17:03:46 +0800191config ROCKCHIP_SPL_RESERVE_IRAM
192 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800193 default 0
Kever Yange484f772017-04-20 17:03:46 +0800194 help
195 SPL may need reserve memory for firmware loaded by SPL, whose load
196 address is in IRAM and may overlay with SPL text area if not
197 reserved.
198
Heiko Stübner355a8802017-02-18 19:46:25 +0100199config ROCKCHIP_BROM_HELPER
200 bool
201
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200202config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
203 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
204 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
205 help
206 Some Rockchip BROM variants (e.g. on the RK3188) load the
207 first stage in segments and enter multiple times. E.g. on
208 the RK3188, the first 1KB of the first stage are loaded
209 first and entered; after returning to the BROM, the
210 remainder of the first stage is loaded, but the BROM
211 re-enters at the same address/to the same code as previously.
212
213 This enables support code in the BOOT0 hook for the SPL stage
214 to allow multiple entries.
215
216config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
217 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
218 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
219 help
220 Some Rockchip BROM variants (e.g. on the RK3188) load the
221 first stage in segments and enter multiple times. E.g. on
222 the RK3188, the first 1KB of the first stage are loaded
223 first and entered; after returning to the BROM, the
224 remainder of the first stage is loaded, but the BROM
225 re-enters at the same address/to the same code as previously.
226
227 This enables support code in the BOOT0 hook for the TPL stage
228 to allow multiple entries.
229
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400230config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200231 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400232
huang lin1115b642015-11-17 14:20:27 +0800233source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800234source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100235source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800236source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200237source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800238source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800239source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800240source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800241source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600242endif