Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012-2014 Panasonic Corporation |
| 3 | * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | /* U-boot - Common settings for UniPhier Family */ |
| 9 | |
| 10 | #ifndef __CONFIG_UNIPHIER_COMMON_H__ |
| 11 | #define __CONFIG_UNIPHIER_COMMON_H__ |
| 12 | |
Masahiro Yamada | 1e72b1c | 2014-12-06 00:03:22 +0900 | [diff] [blame] | 13 | #if defined(CONFIG_MACH_PH1_PRO4) |
| 14 | #define CONFIG_DDR_NUM_CH0 2 |
| 15 | #define CONFIG_DDR_NUM_CH1 2 |
| 16 | |
| 17 | /* Physical start address of SDRAM */ |
| 18 | #define CONFIG_SDRAM0_BASE 0x80000000 |
| 19 | #define CONFIG_SDRAM0_SIZE 0x20000000 |
| 20 | #define CONFIG_SDRAM1_BASE 0xa0000000 |
| 21 | #define CONFIG_SDRAM1_SIZE 0x20000000 |
| 22 | #endif |
| 23 | |
| 24 | #if defined(CONFIG_MACH_PH1_LD4) |
| 25 | #define CONFIG_DDR_NUM_CH0 1 |
| 26 | #define CONFIG_DDR_NUM_CH1 1 |
| 27 | |
| 28 | /* Physical start address of SDRAM */ |
| 29 | #define CONFIG_SDRAM0_BASE 0x80000000 |
| 30 | #define CONFIG_SDRAM0_SIZE 0x10000000 |
| 31 | #define CONFIG_SDRAM1_BASE 0x90000000 |
| 32 | #define CONFIG_SDRAM1_SIZE 0x10000000 |
| 33 | #endif |
| 34 | |
| 35 | #if defined(CONFIG_MACH_PH1_SLD8) |
| 36 | #define CONFIG_DDR_NUM_CH0 1 |
| 37 | #define CONFIG_DDR_NUM_CH1 1 |
| 38 | |
| 39 | /* Physical start address of SDRAM */ |
| 40 | #define CONFIG_SDRAM0_BASE 0x80000000 |
| 41 | #define CONFIG_SDRAM0_SIZE 0x10000000 |
| 42 | #define CONFIG_SDRAM1_BASE 0x90000000 |
| 43 | #define CONFIG_SDRAM1_SIZE 0x10000000 |
| 44 | #endif |
| 45 | |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 46 | /* |
| 47 | * Support card address map |
| 48 | */ |
| 49 | #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) |
| 50 | # define CONFIG_SUPPORT_CARD_BASE 0x03f00000 |
| 51 | # define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) |
| 52 | # define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) |
| 53 | # define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000) |
| 54 | #endif |
| 55 | |
| 56 | #if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) |
| 57 | # define CONFIG_SUPPORT_CARD_BASE 0x08000000 |
| 58 | # define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) |
| 59 | # define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00401630) |
| 60 | # define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00200000) |
| 61 | #endif |
| 62 | |
Masahiro Yamada | 50c1254 | 2014-10-23 22:26:10 +0900 | [diff] [blame] | 63 | #ifdef CONFIG_SYS_NS16550_SERIAL |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 64 | #define CONFIG_SYS_NS16550 |
| 65 | #define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE |
| 66 | #define CONFIG_SYS_NS16550_CLK 12288000 |
| 67 | #define CONFIG_SYS_NS16550_REG_SIZE -2 |
Masahiro Yamada | 50c1254 | 2014-10-23 22:26:10 +0900 | [diff] [blame] | 68 | #endif |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 69 | |
Masahiro Yamada | 1e72b1c | 2014-12-06 00:03:22 +0900 | [diff] [blame] | 70 | /* TODO: move to Kconfig and device tree */ |
| 71 | #if 0 |
| 72 | #define CONFIG_SYS_NS16550_SERIAL |
| 73 | #endif |
| 74 | |
| 75 | #define CONFIG_SMC911X |
| 76 | |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 77 | #define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE |
| 78 | #define CONFIG_SMC911X_32_BIT |
| 79 | |
Masahiro Yamada | 1650694 | 2014-11-11 21:50:41 +0900 | [diff] [blame] | 80 | #define CONFIG_SYS_MALLOC_F_LEN 0x2000 |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 81 | |
| 82 | /*----------------------------------------------------------------------- |
| 83 | * MMU and Cache Setting |
| 84 | *----------------------------------------------------------------------*/ |
| 85 | |
| 86 | /* Comment out the following to enable L1 cache */ |
| 87 | /* #define CONFIG_SYS_ICACHE_OFF */ |
| 88 | /* #define CONFIG_SYS_DCACHE_OFF */ |
| 89 | |
| 90 | /* Comment out the following to enable L2 cache */ |
| 91 | #define CONFIG_UNIPHIER_L2CACHE_ON |
| 92 | |
| 93 | #define CONFIG_DISPLAY_CPUINFO |
| 94 | #define CONFIG_DISPLAY_BOARDINFO |
Masahiro Yamada | 8821681 | 2014-12-06 00:03:26 +0900 | [diff] [blame] | 95 | #define CONFIG_BOARD_EARLY_INIT_R |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 96 | #define CONFIG_BOARD_LATE_INIT |
| 97 | |
| 98 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) |
| 99 | |
| 100 | #define CONFIG_TIMESTAMP |
| 101 | |
| 102 | /* FLASH related */ |
| 103 | #define CONFIG_MTD_DEVICE |
| 104 | |
| 105 | /* |
| 106 | * uncomment the following to disable FLASH related code. |
| 107 | */ |
| 108 | /* #define CONFIG_SYS_NO_FLASH */ |
| 109 | |
| 110 | #define CONFIG_FLASH_CFI_DRIVER |
| 111 | #define CONFIG_SYS_FLASH_CFI |
| 112 | |
| 113 | #define CONFIG_SYS_MAX_FLASH_SECT 256 |
| 114 | #define CONFIG_SYS_MONITOR_BASE 0 |
| 115 | #define CONFIG_SYS_FLASH_BASE 0 |
| 116 | |
| 117 | /* |
| 118 | * flash_toggle does not work for out supoort card. |
| 119 | * We need to use flash_status_poll. |
| 120 | */ |
| 121 | #define CONFIG_SYS_CFI_FLASH_STATUS_POLL |
| 122 | |
| 123 | #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ |
| 124 | |
Masahiro Yamada | 8821681 | 2014-12-06 00:03:26 +0900 | [diff] [blame] | 125 | #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2 |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 126 | |
| 127 | /* serial console configuration */ |
| 128 | #define CONFIG_BAUDRATE 115200 |
| 129 | |
| 130 | #define CONFIG_SYS_GENERIC_BOARD |
| 131 | |
| 132 | #if !defined(CONFIG_SPL_BUILD) |
| 133 | #define CONFIG_USE_ARCH_MEMSET |
| 134 | #define CONFIG_USE_ARCH_MEMCPY |
| 135 | #endif |
| 136 | |
| 137 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 138 | |
| 139 | #define CONFIG_CMDLINE_EDITING /* add command line history */ |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 140 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 141 | /* Print Buffer Size */ |
| 142 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 143 | #define CONFIG_SYS_MAXARGS 16 /* max number of command */ |
| 144 | /* Boot Argument Buffer Size */ |
| 145 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 146 | |
| 147 | #define CONFIG_CONS_INDEX 1 |
| 148 | |
| 149 | /* |
| 150 | * For NAND booting the environment is embedded in the U-Boot image. Please take |
| 151 | * look at the file board/amcc/canyonlands/u-boot-nand.lds for details. |
| 152 | */ |
| 153 | /* #define CONFIG_ENV_IS_IN_NAND */ |
| 154 | #define CONFIG_ENV_IS_NOWHERE |
| 155 | #define CONFIG_ENV_SIZE 0x2000 |
| 156 | #define CONFIG_ENV_OFFSET 0x0 |
| 157 | /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ |
| 158 | |
| 159 | /* Time clock 1MHz */ |
| 160 | #define CONFIG_SYS_TIMER_RATE 1000000 |
| 161 | |
| 162 | /* |
| 163 | * By default, ARP timeout is 5 sec. |
| 164 | * The first ARP request does not seem to work. |
| 165 | * So we need to retry ARP request anyway. |
| 166 | * We want to shrink the interval until the second ARP request. |
| 167 | */ |
| 168 | #define CONFIG_ARP_TIMEOUT 500UL /* 0.5 msec */ |
| 169 | |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 170 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 171 | #define CONFIG_SYS_NAND_MAX_CHIPS 2 |
| 172 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 173 | |
| 174 | #define CONFIG_NAND_DENALI_ECC_SIZE 1024 |
| 175 | |
| 176 | #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 |
| 177 | #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 |
| 178 | |
| 179 | #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) |
| 180 | |
| 181 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
| 182 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 |
| 183 | |
Masahiro Yamada | 0b7e1df | 2014-11-07 18:48:34 +0900 | [diff] [blame] | 184 | /* USB */ |
Masahiro Yamada | 0b7e1df | 2014-11-07 18:48:34 +0900 | [diff] [blame] | 185 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 186 | #define CONFIG_CMD_FAT |
| 187 | #define CONFIG_FAT_WRITE |
| 188 | #define CONFIG_DOS_PARTITION |
| 189 | |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 190 | /* memtest works on */ |
| 191 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 192 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) |
| 193 | |
| 194 | #define CONFIG_BOOTDELAY 3 |
| 195 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
| 196 | #define CONFIG_AUTOBOOT_KEYED 1 |
| 197 | #define CONFIG_AUTOBOOT_PROMPT \ |
| 198 | "Press SPACE to abort autoboot in %d seconds\n", bootdelay |
| 199 | #define CONFIG_AUTOBOOT_DELAY_STR "d" |
| 200 | #define CONFIG_AUTOBOOT_STOP_STR " " |
| 201 | |
| 202 | /* |
| 203 | * Network Configuration |
| 204 | */ |
| 205 | #define CONFIG_ETHADDR 00:21:83:24:00:00 |
| 206 | #define CONFIG_SERVERIP 192.168.11.1 |
| 207 | #define CONFIG_IPADDR 192.168.11.10 |
| 208 | #define CONFIG_GATEWAYIP 192.168.11.1 |
| 209 | #define CONFIG_NETMASK 255.255.255.0 |
| 210 | |
| 211 | #define CONFIG_LOADADDR 0x84000000 |
| 212 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 213 | #define CONFIG_BOOTFILE "fit.itb" |
| 214 | |
| 215 | #define CONFIG_CMDLINE_EDITING /* add command line history */ |
| 216 | |
| 217 | #define CONFIG_BOOTCOMMAND "run $bootmode" |
| 218 | |
| 219 | #define CONFIG_ROOTPATH "/nfs/root/path" |
| 220 | #define CONFIG_NFSBOOTCOMMAND \ |
| 221 | "setenv bootargs $bootargs root=/dev/nfs rw " \ |
| 222 | "nfsroot=$serverip:$rootpath " \ |
| 223 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ |
| 224 | "tftpboot; bootm;" |
| 225 | |
| 226 | #define CONFIG_BOOTARGS " user_debug=0x1f init=/sbin/init" |
| 227 | |
| 228 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 229 | "netdev=eth0\0" \ |
| 230 | "image_offset=0x00080000\0" \ |
| 231 | "image_size=0x00f00000\0" \ |
| 232 | "verify=n\0" \ |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 233 | "norboot=run add_default_bootargs;" \ |
| 234 | "bootm $image_offset\0" \ |
| 235 | "nandboot=run add_default_bootargs;" \ |
| 236 | "nand read $loadaddr $image_offset $image_size;" \ |
| 237 | "bootm\0" \ |
| 238 | "add_default_bootargs=setenv bootargs $bootargs" \ |
| 239 | " console=ttyS0,$baudrate\0" \ |
| 240 | |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 241 | /* Open Firmware flat tree */ |
| 242 | #define CONFIG_OF_LIBFDT |
| 243 | |
| 244 | #define CONFIG_HAVE_ARM_SECURE |
| 245 | |
| 246 | /* Memory Size & Mapping */ |
| 247 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SDRAM0_BASE |
| 248 | |
| 249 | #if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE >= CONFIG_SDRAM1_BASE |
| 250 | /* Thre is no memory hole */ |
| 251 | #define CONFIG_NR_DRAM_BANKS 1 |
| 252 | #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE + CONFIG_SDRAM1_SIZE) |
| 253 | #else |
| 254 | #define CONFIG_NR_DRAM_BANKS 2 |
| 255 | #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE) |
| 256 | #endif |
| 257 | |
| 258 | #define CONFIG_SYS_TEXT_BASE 0x84000000 |
| 259 | |
Masahiro Yamada | 1e72b1c | 2014-12-06 00:03:22 +0900 | [diff] [blame] | 260 | #if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8) |
| 261 | #define CONFIG_SPL_TEXT_BASE 0x00040000 |
| 262 | #endif |
| 263 | #if defined(CONFIG_MACH_PH1_PRO4) |
| 264 | #define CONFIG_SPL_TEXT_BASE 0x00100000 |
| 265 | #endif |
| 266 | |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 267 | #define CONFIG_BOARD_POSTCLK_INIT |
Masahiro Yamada | 05154a2 | 2014-11-11 22:18:22 +0900 | [diff] [blame] | 268 | |
| 269 | #ifndef CONFIG_SPL_BUILD |
Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 270 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 271 | #endif |
| 272 | |
| 273 | #define CONFIG_SYS_SPL_MALLOC_START (0x0ff00000) |
| 274 | #define CONFIG_SYS_SPL_MALLOC_SIZE (0x00004000) |
| 275 | |
| 276 | #define CONFIG_SYS_INIT_SP_ADDR (0x0ff08000) |
| 277 | |
| 278 | #define CONFIG_SPL_FRAMEWORK |
| 279 | #define CONFIG_SPL_NAND_SUPPORT |
| 280 | |
| 281 | #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */ |
| 282 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| 283 | |
| 284 | #define CONFIG_SPL_BOARD_INIT |
| 285 | |
| 286 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 |
| 287 | |
| 288 | #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ |