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Patrice Chotard226d87b2018-04-27 11:01:55 +02001STMicroelectronics STM32 USB HS PHY controller
2
3The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
4switch. It controls PHY configuration and status, and the UTMI+ switch that
5selects either OTG or HOST controller for the second PHY port. It also sets
6PLL configuration.
7
8USBPHYC
9 |_ PLL
10 |
11 |_ PHY port#1 _________________ HOST controller
12 | _ |
13 | / 1|________________|
14 |_ PHY port#2 ----| |________________
15 | \_0| |
16 |_ UTMI switch_______| OTG controller
17
18
19Phy provider node
20=================
21
22Required properties:
23- compatible: must be "st,stm32mp1-usbphyc"
24- reg: address and length of the usb phy control register set
25- clocks: phandle + clock specifier for the PLL phy clock
Patrick Delaunay6ba88cd2019-03-29 15:42:11 +010026- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
27- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
Patrice Chotard226d87b2018-04-27 11:01:55 +020028- #address-cells: number of address cells for phys sub-nodes, must be <1>
29- #size-cells: number of size cells for phys sub-nodes, must be <0>
30
31Optional properties:
32- assigned-clocks: phandle + clock specifier for the PLL phy clock
33- assigned-clock-parents: the PLL phy clock parent
34- resets: phandle + reset specifier
35
36Required nodes: one sub-node per port the controller provides.
37
38Phy sub-nodes
39==============
40
41Required properties:
42- reg: phy port index
43- phy-supply: phandle to the regulator providing 3V3 power to the PHY,
44 see phy-bindings.txt in the same directory.
Patrice Chotard226d87b2018-04-27 11:01:55 +020045- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
46 port#1 and must be <1> for PHY port#2, to select USB controller
47
Patrick Delaunayc8a755d2020-10-15 14:50:57 +020048Optional properties:
49- vbus-supply: phandle to the regulator providing 5V vbus to the USB connector
Patrice Chotard226d87b2018-04-27 11:01:55 +020050
51Example:
52 usbphyc: usb-phy@5a006000 {
53 compatible = "st,stm32mp1-usbphyc";
54 reg = <0x5a006000 0x1000>;
55 clocks = <&rcc_clk USBPHY_K>;
56 resets = <&rcc_rst USBPHY_R>;
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 usbphyc_port0: usb-phy@0 {
61 reg = <0>;
62 phy-supply = <&vdd_usb>;
63 vdda1v1-supply = <&reg11>;
64 vdda1v8-supply = <&reg18>
65 #phy-cells = <0>;
66 };
67
68 usbphyc_port1: usb-phy@1 {
69 reg = <1>;
70 phy-supply = <&vdd_usb>;
71 vdda1v1-supply = <&reg11>;
72 vdda1v8-supply = <&reg18>
73 #phy-cells = <1>;
74 };
75 };