Patrice Chotard | 226d87b | 2018-04-27 11:01:55 +0200 | [diff] [blame] | 1 | STMicroelectronics STM32 USB HS PHY controller |
| 2 | |
| 3 | The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI |
| 4 | switch. It controls PHY configuration and status, and the UTMI+ switch that |
| 5 | selects either OTG or HOST controller for the second PHY port. It also sets |
| 6 | PLL configuration. |
| 7 | |
| 8 | USBPHYC |
| 9 | |_ PLL |
| 10 | | |
| 11 | |_ PHY port#1 _________________ HOST controller |
| 12 | | _ | |
| 13 | | / 1|________________| |
| 14 | |_ PHY port#2 ----| |________________ |
| 15 | | \_0| | |
| 16 | |_ UTMI switch_______| OTG controller |
| 17 | |
| 18 | |
| 19 | Phy provider node |
| 20 | ================= |
| 21 | |
| 22 | Required properties: |
| 23 | - compatible: must be "st,stm32mp1-usbphyc" |
| 24 | - reg: address and length of the usb phy control register set |
| 25 | - clocks: phandle + clock specifier for the PLL phy clock |
Patrick Delaunay | 6ba88cd | 2019-03-29 15:42:11 +0100 | [diff] [blame] | 26 | - vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY |
| 27 | - vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY |
Patrice Chotard | 226d87b | 2018-04-27 11:01:55 +0200 | [diff] [blame] | 28 | - #address-cells: number of address cells for phys sub-nodes, must be <1> |
| 29 | - #size-cells: number of size cells for phys sub-nodes, must be <0> |
| 30 | |
| 31 | Optional properties: |
| 32 | - assigned-clocks: phandle + clock specifier for the PLL phy clock |
| 33 | - assigned-clock-parents: the PLL phy clock parent |
| 34 | - resets: phandle + reset specifier |
| 35 | |
| 36 | Required nodes: one sub-node per port the controller provides. |
| 37 | |
| 38 | Phy sub-nodes |
| 39 | ============== |
| 40 | |
| 41 | Required properties: |
| 42 | - reg: phy port index |
| 43 | - phy-supply: phandle to the regulator providing 3V3 power to the PHY, |
| 44 | see phy-bindings.txt in the same directory. |
Patrice Chotard | 226d87b | 2018-04-27 11:01:55 +0200 | [diff] [blame] | 45 | - #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY |
| 46 | port#1 and must be <1> for PHY port#2, to select USB controller |
| 47 | |
Patrick Delaunay | c8a755d | 2020-10-15 14:50:57 +0200 | [diff] [blame] | 48 | Optional properties: |
| 49 | - vbus-supply: phandle to the regulator providing 5V vbus to the USB connector |
Patrice Chotard | 226d87b | 2018-04-27 11:01:55 +0200 | [diff] [blame] | 50 | |
| 51 | Example: |
| 52 | usbphyc: usb-phy@5a006000 { |
| 53 | compatible = "st,stm32mp1-usbphyc"; |
| 54 | reg = <0x5a006000 0x1000>; |
| 55 | clocks = <&rcc_clk USBPHY_K>; |
| 56 | resets = <&rcc_rst USBPHY_R>; |
| 57 | #address-cells = <1>; |
| 58 | #size-cells = <0>; |
| 59 | |
| 60 | usbphyc_port0: usb-phy@0 { |
| 61 | reg = <0>; |
| 62 | phy-supply = <&vdd_usb>; |
| 63 | vdda1v1-supply = <®11>; |
| 64 | vdda1v8-supply = <®18> |
| 65 | #phy-cells = <0>; |
| 66 | }; |
| 67 | |
| 68 | usbphyc_port1: usb-phy@1 { |
| 69 | reg = <1>; |
| 70 | phy-supply = <&vdd_usb>; |
| 71 | vdda1v1-supply = <®11>; |
| 72 | vdda1v8-supply = <®18> |
| 73 | #phy-cells = <1>; |
| 74 | }; |
| 75 | }; |