blob: 57b61215a2a39b57b186617ed1867f7b65019c00 [file] [log] [blame]
Jim Liufc166b02022-04-01 17:59:39 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2022 Nuvoton Technology, Inc
4 */
5
6#include <dm.h>
7#include <errno.h>
8#include <log.h>
9#include <wdt.h>
10#include <asm/io.h>
11#include <linux/delay.h>
12#include <linux/err.h>
13
14#define NPCM_WTCLK (BIT(10) | BIT(11)) /* Clock divider */
15#define NPCM_WTE BIT(7) /* Enable */
16#define NPCM_WTIE BIT(6) /* Enable irq */
17#define NPCM_WTIS (BIT(4) | BIT(5)) /* Interval selection */
18#define NPCM_WTIF BIT(3) /* Interrupt flag*/
19#define NPCM_WTRF BIT(2) /* Reset flag */
20#define NPCM_WTRE BIT(1) /* Reset enable */
21#define NPCM_WTR BIT(0) /* Reset counter */
22
23struct npcm_wdt_priv {
24 void __iomem *regs;
25};
26
27static int npcm_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
28{
29 struct npcm_wdt_priv *priv = dev_get_priv(dev);
30 u32 time_out, val;
31
32 time_out = (u32)(timeout_ms) / 1000;
33 if (time_out < 2)
34 val = 0x800;
35 else if (time_out < 3)
36 val = 0x420;
37 else if (time_out < 6)
38 val = 0x810;
39 else if (time_out < 11)
40 val = 0x430;
41 else if (time_out < 22)
42 val = 0x820;
43 else if (time_out < 44)
44 val = 0xc00;
45 else if (time_out < 87)
46 val = 0x830;
47 else if (time_out < 173)
48 val = 0xc10;
49 else if (time_out < 688)
50 val = 0xc20;
51 else
52 val = 0xc30;
53
54 val |= NPCM_WTRE | NPCM_WTE | NPCM_WTR | NPCM_WTIE;
55 writel(val, priv->regs);
56
57 return 0;
58}
59
60static int npcm_wdt_stop(struct udevice *dev)
61{
62 struct npcm_wdt_priv *priv = dev_get_priv(dev);
63
64 writel(0, priv->regs);
65
66 return 0;
67}
68
69static int npcm_wdt_reset(struct udevice *dev)
70{
71 struct npcm_wdt_priv *priv = dev_get_priv(dev);
Jim Liuf36249a2023-10-18 10:09:00 +080072 u32 val;
Jim Liufc166b02022-04-01 17:59:39 +080073
Jim Liuf36249a2023-10-18 10:09:00 +080074 val = readl(priv->regs);
75 writel(val | NPCM_WTR, priv->regs);
Jim Liufc166b02022-04-01 17:59:39 +080076
77 return 0;
78}
79
Jim Liua80817b2022-09-13 14:19:24 +080080static int npcm_wdt_expire_now(struct udevice *dev, ulong flags)
81{
Jim Liuf36249a2023-10-18 10:09:00 +080082 struct npcm_wdt_priv *priv = dev_get_priv(dev);
83
84 writel(NPCM_WTR | NPCM_WTRE | NPCM_WTE, priv->regs);
85
86 return 0;
Jim Liua80817b2022-09-13 14:19:24 +080087}
88
Jim Liufc166b02022-04-01 17:59:39 +080089static int npcm_wdt_of_to_plat(struct udevice *dev)
90{
91 struct npcm_wdt_priv *priv = dev_get_priv(dev);
92
93 priv->regs = dev_read_addr_ptr(dev);
94 if (!priv->regs)
95 return -EINVAL;
96
97 return 0;
98}
99
100static const struct wdt_ops npcm_wdt_ops = {
Jim Liua80817b2022-09-13 14:19:24 +0800101 .expire_now = npcm_wdt_expire_now,
Jim Liufc166b02022-04-01 17:59:39 +0800102 .start = npcm_wdt_start,
103 .reset = npcm_wdt_reset,
104 .stop = npcm_wdt_stop,
105};
106
107static const struct udevice_id npcm_wdt_ids[] = {
108 { .compatible = "nuvoton,npcm750-wdt" },
109 { }
110};
111
112static int npcm_wdt_probe(struct udevice *dev)
113{
114 debug("%s() wdt%u\n", __func__, dev_seq(dev));
115 npcm_wdt_stop(dev);
116
117 return 0;
118}
119
120U_BOOT_DRIVER(npcm_wdt) = {
121 .name = "npcm_wdt",
122 .id = UCLASS_WDT,
123 .of_match = npcm_wdt_ids,
124 .probe = npcm_wdt_probe,
125 .priv_auto = sizeof(struct npcm_wdt_priv),
126 .of_to_plat = npcm_wdt_of_to_plat,
127 .ops = &npcm_wdt_ops,
128};