Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Google, Inc |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 6 | #include <fdtdec.h> |
| 7 | #include <errno.h> |
| 8 | #include <dm.h> |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 9 | #include <power/pmic.h> |
| 10 | #include <power/regulator.h> |
| 11 | #include <power/s5m8767.h> |
| 12 | |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 13 | static const struct sec_voltage_desc buck_v1 = { |
| 14 | .max = 2225000, |
| 15 | .min = 650000, |
| 16 | .step = 6250, |
| 17 | }; |
| 18 | |
| 19 | static const struct sec_voltage_desc buck_v2 = { |
| 20 | .max = 1600000, |
| 21 | .min = 600000, |
| 22 | .step = 6250, |
| 23 | }; |
| 24 | |
| 25 | static const struct sec_voltage_desc buck_v3 = { |
| 26 | .max = 3000000, |
| 27 | .min = 750000, |
| 28 | .step = 12500, |
| 29 | }; |
| 30 | |
| 31 | static const struct sec_voltage_desc ldo_v1 = { |
| 32 | .max = 3950000, |
| 33 | .min = 800000, |
| 34 | .step = 50000, |
| 35 | }; |
| 36 | |
| 37 | static const struct sec_voltage_desc ldo_v2 = { |
| 38 | .max = 2375000, |
| 39 | .min = 800000, |
| 40 | .step = 25000, |
| 41 | }; |
| 42 | |
| 43 | static const struct s5m8767_para buck_param[] = { |
| 44 | /* |
| 45 | * | voltage ----| | enable -| voltage |
| 46 | * regnum addr bpos mask addr on desc |
| 47 | */ |
| 48 | {S5M8767_BUCK1, 0x33, 0x0, 0xff, 0x32, 0x3, &buck_v1}, |
| 49 | {S5M8767_BUCK2, 0x35, 0x0, 0xff, 0x34, 0x1, &buck_v2}, |
| 50 | {S5M8767_BUCK3, 0x3e, 0x0, 0xff, 0x3d, 0x1, &buck_v2}, |
| 51 | {S5M8767_BUCK4, 0x47, 0x0, 0xff, 0x46, 0x1, &buck_v2}, |
| 52 | {S5M8767_BUCK5, 0x50, 0x0, 0xff, 0x4f, 0x3, &buck_v1}, |
| 53 | {S5M8767_BUCK6, 0x55, 0x0, 0xff, 0x54, 0x3, &buck_v1}, |
| 54 | {S5M8767_BUCK7, 0x57, 0x0, 0xff, 0x56, 0x3, &buck_v3}, |
| 55 | {S5M8767_BUCK8, 0x59, 0x0, 0xff, 0x58, 0x3, &buck_v3}, |
| 56 | {S5M8767_BUCK9, 0x5b, 0x0, 0xff, 0x5a, 0x3, &buck_v3}, |
| 57 | }; |
| 58 | |
| 59 | static const struct s5m8767_para ldo_param[] = { |
| 60 | {S5M8767_LDO1, 0x5c, 0x0, 0x3f, 0x5c, 0x3, &ldo_v2}, |
| 61 | {S5M8767_LDO2, 0x5d, 0x0, 0x3f, 0x5d, 0x1, &ldo_v2}, |
| 62 | {S5M8767_LDO3, 0x61, 0x0, 0x3f, 0x61, 0x3, &ldo_v1}, |
| 63 | {S5M8767_LDO4, 0x62, 0x0, 0x3f, 0x62, 0x3, &ldo_v1}, |
| 64 | {S5M8767_LDO5, 0x63, 0x0, 0x3f, 0x63, 0x3, &ldo_v1}, |
| 65 | {S5M8767_LDO6, 0x64, 0x0, 0x3f, 0x64, 0x1, &ldo_v2}, |
| 66 | {S5M8767_LDO7, 0x65, 0x0, 0x3f, 0x65, 0x1, &ldo_v2}, |
| 67 | {S5M8767_LDO8, 0x66, 0x0, 0x3f, 0x66, 0x1, &ldo_v2}, |
| 68 | {S5M8767_LDO9, 0x67, 0x0, 0x3f, 0x67, 0x3, &ldo_v1}, |
| 69 | {S5M8767_LDO10, 0x68, 0x0, 0x3f, 0x68, 0x1, &ldo_v1}, |
| 70 | {S5M8767_LDO11, 0x69, 0x0, 0x3f, 0x69, 0x1, &ldo_v1}, |
| 71 | {S5M8767_LDO12, 0x6a, 0x0, 0x3f, 0x6a, 0x1, &ldo_v1}, |
| 72 | {S5M8767_LDO13, 0x6b, 0x0, 0x3f, 0x6b, 0x3, &ldo_v1}, |
| 73 | {S5M8767_LDO14, 0x6c, 0x0, 0x3f, 0x6c, 0x1, &ldo_v1}, |
| 74 | {S5M8767_LDO15, 0x6d, 0x0, 0x3f, 0x6d, 0x1, &ldo_v2}, |
| 75 | {S5M8767_LDO16, 0x6e, 0x0, 0x3f, 0x6e, 0x1, &ldo_v1}, |
| 76 | {S5M8767_LDO17, 0x6f, 0x0, 0x3f, 0x6f, 0x3, &ldo_v1}, |
| 77 | {S5M8767_LDO18, 0x70, 0x0, 0x3f, 0x70, 0x3, &ldo_v1}, |
| 78 | {S5M8767_LDO19, 0x71, 0x0, 0x3f, 0x71, 0x3, &ldo_v1}, |
| 79 | {S5M8767_LDO20, 0x72, 0x0, 0x3f, 0x72, 0x3, &ldo_v1}, |
| 80 | {S5M8767_LDO21, 0x73, 0x0, 0x3f, 0x73, 0x3, &ldo_v1}, |
| 81 | {S5M8767_LDO22, 0x74, 0x0, 0x3f, 0x74, 0x3, &ldo_v1}, |
| 82 | {S5M8767_LDO23, 0x75, 0x0, 0x3f, 0x75, 0x3, &ldo_v1}, |
| 83 | {S5M8767_LDO24, 0x76, 0x0, 0x3f, 0x76, 0x3, &ldo_v1}, |
| 84 | {S5M8767_LDO25, 0x77, 0x0, 0x3f, 0x77, 0x3, &ldo_v1}, |
| 85 | {S5M8767_LDO26, 0x78, 0x0, 0x3f, 0x78, 0x3, &ldo_v1}, |
| 86 | {S5M8767_LDO27, 0x79, 0x0, 0x3f, 0x79, 0x3, &ldo_v1}, |
| 87 | {S5M8767_LDO28, 0x7a, 0x0, 0x3f, 0x7a, 0x3, &ldo_v1}, |
| 88 | }; |
| 89 | |
| 90 | enum { |
| 91 | ENABLE_SHIFT = 6, |
| 92 | ENABLE_MASK = 3, |
| 93 | }; |
| 94 | |
| 95 | static int reg_get_value(struct udevice *dev, const struct s5m8767_para *param) |
| 96 | { |
| 97 | const struct sec_voltage_desc *desc; |
| 98 | int ret, uv, val; |
| 99 | |
| 100 | ret = pmic_reg_read(dev->parent, param->vol_addr); |
| 101 | if (ret < 0) |
| 102 | return ret; |
| 103 | |
| 104 | desc = param->vol; |
| 105 | val = (ret >> param->vol_bitpos) & param->vol_bitmask; |
| 106 | uv = desc->min + val * desc->step; |
| 107 | |
| 108 | return uv; |
| 109 | } |
| 110 | |
| 111 | static int reg_set_value(struct udevice *dev, const struct s5m8767_para *param, |
| 112 | int uv) |
| 113 | { |
| 114 | const struct sec_voltage_desc *desc; |
| 115 | int ret, val; |
| 116 | |
| 117 | desc = param->vol; |
| 118 | if (uv < desc->min || uv > desc->max) |
| 119 | return -EINVAL; |
| 120 | val = (uv - desc->min) / desc->step; |
| 121 | val = (val & param->vol_bitmask) << param->vol_bitpos; |
| 122 | ret = pmic_clrsetbits(dev->parent, param->vol_addr, |
| 123 | param->vol_bitmask << param->vol_bitpos, |
| 124 | val); |
| 125 | |
| 126 | return ret; |
| 127 | } |
| 128 | |
| 129 | static int s5m8767_ldo_probe(struct udevice *dev) |
| 130 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 131 | struct dm_regulator_uclass_plat *uc_pdata; |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 132 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 133 | uc_pdata = dev_get_uclass_plat(dev); |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 134 | |
| 135 | uc_pdata->type = REGULATOR_TYPE_LDO; |
| 136 | uc_pdata->mode_count = 0; |
| 137 | |
| 138 | return 0; |
| 139 | } |
| 140 | static int ldo_get_value(struct udevice *dev) |
| 141 | { |
| 142 | int ldo = dev->driver_data; |
| 143 | |
| 144 | return reg_get_value(dev, &ldo_param[ldo]); |
| 145 | } |
| 146 | |
| 147 | static int ldo_set_value(struct udevice *dev, int uv) |
| 148 | { |
| 149 | int ldo = dev->driver_data; |
| 150 | |
| 151 | return reg_set_value(dev, &ldo_param[ldo], uv); |
| 152 | } |
| 153 | |
| 154 | static int reg_get_enable(struct udevice *dev, const struct s5m8767_para *param) |
| 155 | { |
| 156 | bool enable; |
| 157 | int ret; |
| 158 | |
| 159 | ret = pmic_reg_read(dev->parent, param->reg_enaddr); |
| 160 | if (ret < 0) |
| 161 | return ret; |
| 162 | |
| 163 | enable = (ret >> ENABLE_SHIFT) & ENABLE_MASK; |
| 164 | |
| 165 | return enable; |
| 166 | } |
| 167 | |
| 168 | static int reg_set_enable(struct udevice *dev, const struct s5m8767_para *param, |
| 169 | bool enable) |
| 170 | { |
| 171 | int ret; |
| 172 | |
| 173 | ret = pmic_reg_read(dev->parent, param->reg_enaddr); |
| 174 | if (ret < 0) |
| 175 | return ret; |
| 176 | |
| 177 | ret = pmic_clrsetbits(dev->parent, param->reg_enaddr, |
| 178 | ENABLE_MASK << ENABLE_SHIFT, |
| 179 | enable ? param->reg_enbiton << ENABLE_SHIFT : 0); |
| 180 | |
| 181 | return ret; |
| 182 | } |
| 183 | |
Keerthy | 6ec40f3 | 2017-06-13 09:53:54 +0530 | [diff] [blame] | 184 | static int ldo_get_enable(struct udevice *dev) |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 185 | { |
| 186 | int ldo = dev->driver_data; |
| 187 | |
| 188 | return reg_get_enable(dev, &ldo_param[ldo]); |
| 189 | } |
| 190 | |
| 191 | static int ldo_set_enable(struct udevice *dev, bool enable) |
| 192 | { |
| 193 | int ldo = dev->driver_data; |
| 194 | |
| 195 | return reg_set_enable(dev, &ldo_param[ldo], enable); |
| 196 | } |
| 197 | |
| 198 | static int s5m8767_buck_probe(struct udevice *dev) |
| 199 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 200 | struct dm_regulator_uclass_plat *uc_pdata; |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 201 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 202 | uc_pdata = dev_get_uclass_plat(dev); |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 203 | |
| 204 | uc_pdata->type = REGULATOR_TYPE_BUCK; |
| 205 | uc_pdata->mode_count = 0; |
| 206 | |
| 207 | return 0; |
| 208 | } |
| 209 | |
| 210 | static int buck_get_value(struct udevice *dev) |
| 211 | { |
| 212 | int buck = dev->driver_data; |
| 213 | |
| 214 | return reg_get_value(dev, &buck_param[buck]); |
| 215 | } |
| 216 | |
| 217 | static int buck_set_value(struct udevice *dev, int uv) |
| 218 | { |
| 219 | int buck = dev->driver_data; |
| 220 | |
| 221 | return reg_set_value(dev, &buck_param[buck], uv); |
| 222 | } |
| 223 | |
Keerthy | 6ec40f3 | 2017-06-13 09:53:54 +0530 | [diff] [blame] | 224 | static int buck_get_enable(struct udevice *dev) |
Simon Glass | 2336103 | 2015-07-02 18:16:01 -0600 | [diff] [blame] | 225 | { |
| 226 | int buck = dev->driver_data; |
| 227 | |
| 228 | return reg_get_enable(dev, &buck_param[buck]); |
| 229 | } |
| 230 | |
| 231 | static int buck_set_enable(struct udevice *dev, bool enable) |
| 232 | { |
| 233 | int buck = dev->driver_data; |
| 234 | |
| 235 | return reg_set_enable(dev, &buck_param[buck], enable); |
| 236 | } |
| 237 | |
| 238 | static const struct dm_regulator_ops s5m8767_ldo_ops = { |
| 239 | .get_value = ldo_get_value, |
| 240 | .set_value = ldo_set_value, |
| 241 | .get_enable = ldo_get_enable, |
| 242 | .set_enable = ldo_set_enable, |
| 243 | }; |
| 244 | |
| 245 | U_BOOT_DRIVER(s5m8767_ldo) = { |
| 246 | .name = S5M8767_LDO_DRIVER, |
| 247 | .id = UCLASS_REGULATOR, |
| 248 | .ops = &s5m8767_ldo_ops, |
| 249 | .probe = s5m8767_ldo_probe, |
| 250 | }; |
| 251 | |
| 252 | static const struct dm_regulator_ops s5m8767_buck_ops = { |
| 253 | .get_value = buck_get_value, |
| 254 | .set_value = buck_set_value, |
| 255 | .get_enable = buck_get_enable, |
| 256 | .set_enable = buck_set_enable, |
| 257 | }; |
| 258 | |
| 259 | U_BOOT_DRIVER(s5m8767_buck) = { |
| 260 | .name = S5M8767_BUCK_DRIVER, |
| 261 | .id = UCLASS_REGULATOR, |
| 262 | .ops = &s5m8767_buck_ops, |
| 263 | .probe = s5m8767_buck_probe, |
| 264 | }; |