blob: 86d3ffe97ca7bc08b852b333e75c729631b92dc9 [file] [log] [blame]
Kever Yangfca798d2018-11-09 11:18:15 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
6#include <common.h>
7#include <debug_uart.h>
8#include <dm.h>
9#include <ram.h>
10#include <spl.h>
11#include <asm/io.h>
12#include <asm/arch-rockchip/bootrom.h>
13
14#define TIMER_CHN10_BASE 0xff8680a0
15#define TIMER_END_COUNT_L 0x00
16#define TIMER_END_COUNT_H 0x04
17#define TIMER_INIT_COUNT_L 0x10
18#define TIMER_INIT_COUNT_H 0x14
19#define TIMER_CONTROL_REG 0x1c
20
21#define TIMER_EN 0x1
22#define TIMER_FMODE (0 << 1)
23#define TIMER_RMODE (1 << 1)
24
25void secure_timer_init(void)
26{
27 writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
28 writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
29 writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
30 writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
31 writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
32}
33
34void board_init_f(ulong dummy)
35{
36 struct udevice *dev;
37 int ret;
38
39#ifdef CONFIG_DEBUG_UART
40 debug_uart_init();
41 /*
42 * Debug UART can be used from here if required:
43 *
44 * debug_uart_init();
45 * printch('a');
46 * printhex8(0x1234);
47 * printascii("string");
48 */
49 printascii("U-Boot TPL board init\n");
50#endif
51 ret = spl_early_init();
52 if (ret) {
53 debug("spl_early_init() failed: %d\n", ret);
54 hang();
55 }
56
57 secure_timer_init();
58
59 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
60 if (ret) {
61 pr_err("DRAM init failed: %d\n", ret);
62 return;
63 }
64}
65
66void board_return_to_bootrom(void)
67{
68 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
69}
70
71u32 spl_boot_device(void)
72{
73 return BOOT_DEVICE_BOOTROM;
74}
75
76#ifdef CONFIG_SPL_LOAD_FIT
77int board_fit_config_name_match(const char *name)
78{
79 /* Just empty function now - can't decide what to choose */
80 debug("%s: %s\n", __func__, name);
81
82 return 0;
83}
84#endif