blob: 787129bbaeaf1f4f8f3be7047c4baa17243a8cdd [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Jagan Teki387fd4b2017-09-27 23:03:12 +05302/*
3 * Copyright (C) 2017 Amarula Solutions
Jagan Teki387fd4b2017-09-27 23:03:12 +05304 */
5
6#include <common.h>
7#include <debug_uart.h>
8#include <dm.h>
9#include <ram.h>
10#include <spl.h>
11#include <version.h>
12#include <asm/io.h>
Philipp Tomsich9ba112b2019-04-30 00:00:38 +020013#include <asm/arch-rockchip/bootrom.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +080014#include <asm/arch-rockchip/clock.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +080015#include <asm/arch-rockchip/sys_proto.h>
16#include <asm/arch-rockchip/timer.h>
Jagan Teki387fd4b2017-09-27 23:03:12 +053017
Jagan Teki387fd4b2017-09-27 23:03:12 +053018void board_init_f(ulong dummy)
19{
20 struct udevice *dev;
21 int ret;
22
Kever Yangabfed9b2019-03-29 09:09:04 +080023#ifdef CONFIG_DEBUG_UART
Jagan Teki387fd4b2017-09-27 23:03:12 +053024 /*
25 * Debug UART can be used from here if required:
26 *
27 * debug_uart_init();
28 * printch('a');
29 * printhex8(0x1234);
30 * printascii("string");
31 */
32 debug_uart_init();
Kever Yangabfed9b2019-03-29 09:09:04 +080033#endif
Jagan Teki387fd4b2017-09-27 23:03:12 +053034 ret = spl_early_init();
35 if (ret) {
36 debug("spl_early_init() failed: %d\n", ret);
37 hang();
38 }
39
40 rockchip_timer_init();
41 configure_l2ctlr();
42
43 ret = rockchip_get_clk(&dev);
44 if (ret) {
45 debug("CLK init failed: %d\n", ret);
46 return;
47 }
48
49 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
50 if (ret) {
51 debug("DRAM init failed: %d\n", ret);
52 return;
53 }
54}
55
56void board_return_to_bootrom(void)
57{
Philipp Tomsich7234c732017-10-10 16:21:16 +020058 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
Jagan Teki387fd4b2017-09-27 23:03:12 +053059}
60
61u32 spl_boot_device(void)
62{
63 return BOOT_DEVICE_BOOTROM;
64}
65
66void spl_board_init(void)
67{
68 puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
69 U_BOOT_TIME ")\n");
70}