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Michal Simek71d84b42018-03-27 13:43:05 +02001// SPDX-License-Identifier: GPL-2.0+
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +05302/*
Michal Simeke2612e12015-07-22 11:12:10 +02003 * Copyright (C) 2011 - 2015 Xilinx
4 * Copyright (C) 2012 National Instruments Corp.
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +05305 */
6/dts-v1/;
7#include "zynq-7000.dtsi"
8
9/ {
Luis Aranedaac891162018-07-12 00:10:20 -040010 model = "Xilinx ZC702 board";
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +053011 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
Masahiro Yamadad6367a22014-05-15 20:37:54 +090012
Masahiro Yamada87f645e2014-05-15 20:37:55 +090013 aliases {
Michal Simeke2612e12015-07-22 11:12:10 +020014 ethernet0 = &gem0;
15 i2c0 = &i2c0;
Masahiro Yamada87f645e2014-05-15 20:37:55 +090016 serial0 = &uart1;
Jagan Teki0ac0ffb2015-08-15 23:15:21 +053017 spi0 = &qspi;
Michal Simek9ecd2682015-11-30 16:13:03 +010018 mmc0 = &sdhci0;
Vipul Kumardd3f8dc2018-08-07 16:30:04 +053019 usb0 = &usb0;
Masahiro Yamada87f645e2014-05-15 20:37:55 +090020 };
21
Michal Simekb3585f42016-11-11 13:11:37 +010022 memory@0 {
Masahiro Yamadad6367a22014-05-15 20:37:54 +090023 device_type = "memory";
Michal Simeke2612e12015-07-22 11:12:10 +020024 reg = <0x0 0x40000000>;
Masahiro Yamadad6367a22014-05-15 20:37:54 +090025 };
Michal Simeke2612e12015-07-22 11:12:10 +020026
27 chosen {
Michal Simek8073b862016-04-07 11:15:00 +020028 bootargs = "";
Michal Simeke2612e12015-07-22 11:12:10 +020029 stdout-path = "serial0:115200n8";
30 };
31
Michal Simek064be102015-07-22 11:41:11 +020032 gpio-keys {
33 compatible = "gpio-keys";
Michal Simek064be102015-07-22 11:41:11 +020034 autorepeat;
35 sw14 {
36 label = "sw14";
37 gpios = <&gpio0 12 0>;
38 linux,code = <108>; /* down */
Sudeep Holla46521572015-10-21 11:10:16 +010039 wakeup-source;
Michal Simek064be102015-07-22 11:41:11 +020040 autorepeat;
41 };
42 sw13 {
43 label = "sw13";
44 gpios = <&gpio0 14 0>;
45 linux,code = <103>; /* up */
Sudeep Holla46521572015-10-21 11:10:16 +010046 wakeup-source;
Michal Simek064be102015-07-22 11:41:11 +020047 autorepeat;
48 };
49 };
50
Michal Simeke2612e12015-07-22 11:12:10 +020051 leds {
52 compatible = "gpio-leds";
53
Michal Simek958c0e92020-11-26 14:25:02 +010054 led-ds23 {
Michal Simeke2612e12015-07-22 11:12:10 +020055 label = "ds23";
56 gpios = <&gpio0 10 0>;
57 linux,default-trigger = "heartbeat";
58 };
59 };
60
61 usb_phy0: phy0 {
62 compatible = "usb-nop-xceiv";
63 #phy-cells = <0>;
64 };
65};
66
Michal Simeke2612e12015-07-22 11:12:10 +020067&can0 {
68 status = "okay";
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_can0_default>;
71};
72
73&clkc {
74 ps-clk-frequency = <33333333>;
75};
76
77&gem0 {
78 status = "okay";
79 phy-mode = "rgmii-id";
80 phy-handle = <&ethernet_phy>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_gem0_default>;
Punnaiah Choudary Kallurib3d15312016-02-03 15:27:18 +053083 phy-reset-gpio = <&gpio0 11 0>;
84 phy-reset-active-low;
Michal Simeke2612e12015-07-22 11:12:10 +020085
86 ethernet_phy: ethernet-phy@7 {
87 reg = <7>;
Sai Pavan Boddub2ed84b2017-03-06 18:17:19 +053088 device_type = "ethernet-phy";
Michal Simeke2612e12015-07-22 11:12:10 +020089 };
90};
91
92&gpio0 {
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_gpio0_default>;
95};
96
97&i2c0 {
98 status = "okay";
99 clock-frequency = <400000>;
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530100 pinctrl-names = "default", "gpio";
Michal Simeke2612e12015-07-22 11:12:10 +0200101 pinctrl-0 = <&pinctrl_i2c0_default>;
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530102 pinctrl-1 = <&pinctrl_i2c0_gpio>;
103 scl-gpios = <&gpio0 50 0>;
104 sda-gpios = <&gpio0 51 0>;
Michal Simeke2612e12015-07-22 11:12:10 +0200105
Michal Simekf6fd3f22018-02-06 14:00:30 +0100106 i2c-mux@74 {
Michal Simeke2612e12015-07-22 11:12:10 +0200107 compatible = "nxp,pca9548";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 reg = <0x74>;
111
112 i2c@0 {
113 #address-cells = <1>;
114 #size-cells = <0>;
115 reg = <0>;
116 si570: clock-generator@5d {
117 #clock-cells = <0>;
118 compatible = "silabs,si570";
119 temperature-stability = <50>;
120 reg = <0x5d>;
121 factory-fout = <156250000>;
122 clock-frequency = <148500000>;
123 };
124 };
125
Christian Kohn9d979ac2015-11-12 15:53:35 -0800126 i2c@1 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 reg = <1>;
130 adv7511: hdmi-tx@39 {
131 compatible = "adi,adv7511";
132 reg = <0x39>;
133 adi,input-depth = <8>;
134 adi,input-colorspace = "yuv422";
135 adi,input-clock = "1x";
136 adi,input-style = <3>;
137 adi,input-justification = "right";
138 };
139 };
140
Michal Simeke2612e12015-07-22 11:12:10 +0200141 i2c@2 {
142 #address-cells = <1>;
143 #size-cells = <0>;
144 reg = <2>;
145 eeprom@54 {
Javier Martinez Canillasa2ce2722017-06-15 20:54:12 +0200146 compatible = "atmel,24c08";
Michal Simeke2612e12015-07-22 11:12:10 +0200147 reg = <0x54>;
148 };
149 };
150
151 i2c@3 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 reg = <3>;
155 gpio@21 {
156 compatible = "ti,tca6416";
157 reg = <0x21>;
158 gpio-controller;
159 #gpio-cells = <2>;
160 };
161 };
162
163 i2c@4 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 reg = <4>;
167 rtc@51 {
168 compatible = "nxp,pcf8563";
169 reg = <0x51>;
170 };
171 };
172
173 i2c@7 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 reg = <7>;
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800177 hwmon@34 {
Michal Simeke2612e12015-07-22 11:12:10 +0200178 compatible = "ti,ucd9248";
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800179 reg = <0x34>;
Michal Simeke2612e12015-07-22 11:12:10 +0200180 };
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800181 hwmon@35 {
Michal Simeke2612e12015-07-22 11:12:10 +0200182 compatible = "ti,ucd9248";
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800183 reg = <0x35>;
Michal Simeke2612e12015-07-22 11:12:10 +0200184 };
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800185 hwmon@36 {
Michal Simeke2612e12015-07-22 11:12:10 +0200186 compatible = "ti,ucd9248";
Quanyang Wang8242d1d2019-09-23 17:47:08 +0800187 reg = <0x36>;
Michal Simeke2612e12015-07-22 11:12:10 +0200188 };
189 };
190 };
191};
192
193&pinctrl0 {
194 pinctrl_can0_default: can0-default {
195 mux {
196 function = "can0";
197 groups = "can0_9_grp";
198 };
199
200 conf {
201 groups = "can0_9_grp";
202 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600203 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200204 };
205
206 conf-rx {
207 pins = "MIO46";
208 bias-high-impedance;
209 };
210
211 conf-tx {
212 pins = "MIO47";
213 bias-disable;
214 };
215 };
216
217 pinctrl_gem0_default: gem0-default {
218 mux {
219 function = "ethernet0";
220 groups = "ethernet0_0_grp";
221 };
222
223 conf {
224 groups = "ethernet0_0_grp";
225 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600226 power-source = <4>;
Michal Simeke2612e12015-07-22 11:12:10 +0200227 };
228
229 conf-rx {
230 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
231 bias-high-impedance;
232 low-power-disable;
233 };
234
235 conf-tx {
236 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
237 bias-disable;
238 low-power-enable;
239 };
240
241 mux-mdio {
242 function = "mdio0";
243 groups = "mdio0_0_grp";
244 };
245
246 conf-mdio {
247 groups = "mdio0_0_grp";
248 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600249 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200250 bias-disable;
251 };
252 };
253
254 pinctrl_gpio0_default: gpio0-default {
255 mux {
256 function = "gpio0";
257 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
258 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
259 "gpio0_13_grp", "gpio0_14_grp";
260 };
261
262 conf {
263 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
264 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
265 "gpio0_13_grp", "gpio0_14_grp";
266 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600267 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200268 };
269
270 conf-pull-up {
271 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
272 bias-pull-up;
273 };
274
275 conf-pull-none {
276 pins = "MIO7", "MIO8";
277 bias-disable;
278 };
279 };
280
281 pinctrl_i2c0_default: i2c0-default {
282 mux {
283 groups = "i2c0_10_grp";
284 function = "i2c0";
285 };
286
287 conf {
288 groups = "i2c0_10_grp";
289 bias-pull-up;
290 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600291 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200292 };
293 };
294
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530295 pinctrl_i2c0_gpio: i2c0-gpio {
296 mux {
297 groups = "gpio0_50_grp", "gpio0_51_grp";
298 function = "gpio0";
299 };
300
301 conf {
302 groups = "gpio0_50_grp", "gpio0_51_grp";
303 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600304 power-source = <1>;
Chirag Parekh0d7fcb12016-12-27 22:07:58 +0530305 };
306 };
307
Michal Simeke2612e12015-07-22 11:12:10 +0200308 pinctrl_sdhci0_default: sdhci0-default {
309 mux {
310 groups = "sdio0_2_grp";
311 function = "sdio0";
312 };
313
314 conf {
315 groups = "sdio0_2_grp";
316 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600317 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200318 bias-disable;
319 };
320
321 mux-cd {
322 groups = "gpio0_0_grp";
323 function = "sdio0_cd";
324 };
325
326 conf-cd {
327 groups = "gpio0_0_grp";
328 bias-high-impedance;
329 bias-pull-up;
330 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600331 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200332 };
333
334 mux-wp {
335 groups = "gpio0_15_grp";
336 function = "sdio0_wp";
337 };
338
339 conf-wp {
340 groups = "gpio0_15_grp";
341 bias-high-impedance;
342 bias-pull-up;
343 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600344 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200345 };
346 };
347
348 pinctrl_uart1_default: uart1-default {
349 mux {
350 groups = "uart1_10_grp";
351 function = "uart1";
352 };
353
354 conf {
355 groups = "uart1_10_grp";
356 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600357 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200358 };
359
360 conf-rx {
361 pins = "MIO49";
362 bias-high-impedance;
363 };
364
365 conf-tx {
366 pins = "MIO48";
367 bias-disable;
368 };
369 };
370
371 pinctrl_usb0_default: usb0-default {
372 mux {
373 groups = "usb0_0_grp";
374 function = "usb0";
375 };
376
377 conf {
378 groups = "usb0_0_grp";
379 slew-rate = <0>;
Sai Krishna Potthuria735bc82021-08-06 01:41:46 -0600380 power-source = <1>;
Michal Simeke2612e12015-07-22 11:12:10 +0200381 };
382
383 conf-rx {
384 pins = "MIO29", "MIO31", "MIO36";
385 bias-high-impedance;
386 };
387
388 conf-tx {
389 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
390 "MIO35", "MIO37", "MIO38", "MIO39";
391 bias-disable;
392 };
393 };
394};
395
Michal Simek6603e1c2016-04-07 13:04:15 +0200396&qspi {
397 u-boot,dm-pre-reloc;
398 status = "okay";
Michal Simekeacca2f2021-08-06 13:30:19 +0200399 num-cs = <1>;
400 flash@0 {
401 compatible = "n25q128a11", "jedec,spi-nor";
402 reg = <0x0>;
403 spi-tx-bus-width = <1>;
404 spi-rx-bus-width = <4>;
405 spi-max-frequency = <50000000>;
406 };
Michal Simek6603e1c2016-04-07 13:04:15 +0200407};
408
Michal Simeke2612e12015-07-22 11:12:10 +0200409&sdhci0 {
Michal Simek9ecd2682015-11-30 16:13:03 +0100410 u-boot,dm-pre-reloc;
Michal Simeke2612e12015-07-22 11:12:10 +0200411 status = "okay";
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_sdhci0_default>;
414};
415
416&uart1 {
Simon Glass8c7323a2015-10-17 19:41:24 -0600417 u-boot,dm-pre-reloc;
Michal Simeke2612e12015-07-22 11:12:10 +0200418 status = "okay";
419 pinctrl-names = "default";
420 pinctrl-0 = <&pinctrl_uart1_default>;
421};
422
423&usb0 {
424 status = "okay";
425 dr_mode = "host";
426 usb-phy = <&usb_phy0>;
427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_usb0_default>;
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +0530429};