wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
| 5 | * |
| 6 | * 2003-2004 (c) MontaVista Software, Inc. |
| 7 | * |
| 8 | * Configuation settings for the ADS GraphicsClient+ board. |
| 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
| 29 | #ifndef __CONFIG_H |
| 30 | #define __CONFIG_H |
| 31 | |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 32 | /* |
| 33 | * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000. |
| 34 | * We don't actually init RAM in this case since we're using U-Boot as |
| 35 | * an secondary boot loader during Linux kernel development and testing, |
| 36 | * e.g. bootp/tftp download of the kernel is a far more convenient |
| 37 | * when testing new kernels on this target. However the ADS GCPlus Linux |
| 38 | * boot ROM leaves the MMU enabled when it passes control to U-Boot. So |
wdenk | 336b2bc | 2005-04-02 23:52:25 +0000 | [diff] [blame] | 39 | * we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem. |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 40 | */ |
wdenk | 3d3d99f | 2005-04-04 12:44:11 +0000 | [diff] [blame] | 41 | #undef CONFIG_SKIP_LOWLEVEL_INIT |
| 42 | #define CONFIG_SKIP_RELOCATE_UBOOT 1 |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 43 | |
| 44 | /* |
| 45 | * High Level Configuration Options |
| 46 | * (easy to change) |
| 47 | */ |
| 48 | #define CONFIG_SA1110 1 /* This is an SA1100 CPU */ |
| 49 | #define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */ |
| 50 | |
| 51 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 52 | |
| 53 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 54 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 55 | #define CONFIG_INITRD_TAG 1 |
| 56 | |
| 57 | /* |
| 58 | * Size of malloc() pool |
| 59 | */ |
| 60 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
| 61 | #define CFG_GBL_DATA_SIZE 128 /* size rsrvd for initial data */ |
| 62 | |
| 63 | |
| 64 | /* |
| 65 | * Hardware drivers |
| 66 | */ |
| 67 | #define CONFIG_DRIVER_LAN91C96 /* we have an SMC9194 on-board */ |
| 68 | #define CONFIG_LAN91C96_BASE 0x100e0000 |
| 69 | |
| 70 | /* |
| 71 | * select serial console configuration |
| 72 | */ |
| 73 | #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */ |
| 74 | |
| 75 | /* allow to overwrite serial and ethaddr */ |
| 76 | #define CONFIG_ENV_OVERWRITE |
| 77 | |
| 78 | #define CONFIG_BAUDRATE 38400 |
| 79 | |
Jon Loeliger | f4100ec | 2007-07-04 22:32:19 -0500 | [diff] [blame] | 80 | |
| 81 | /* |
| 82 | * Command line configuration. |
| 83 | */ |
| 84 | #include <config_cmd_default.h> |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 85 | |
Jon Loeliger | f4100ec | 2007-07-04 22:32:19 -0500 | [diff] [blame] | 86 | #define CONFIG_CMD_DHCP |
| 87 | |
| 88 | |
Jon Loeliger | dcf1451 | 2007-07-09 21:48:26 -0500 | [diff] [blame] | 89 | /* |
| 90 | * BOOTP options |
| 91 | */ |
| 92 | #define CONFIG_BOOTP_SUBNETMASK |
| 93 | #define CONFIG_BOOTP_GATEWAY |
| 94 | #define CONFIG_BOOTP_HOSTNAME |
| 95 | #define CONFIG_BOOTP_BOOTPATH |
| 96 | |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 97 | |
| 98 | #define CONFIG_BOOTDELAY 3 |
| 99 | #define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp" |
| 100 | #define CONFIG_BOOTCOMMAND "bootp;tftp;bootm" |
| 101 | #define CFG_AUTOLOAD "n" /* No autoload */ |
| 102 | |
Jon Loeliger | f4100ec | 2007-07-04 22:32:19 -0500 | [diff] [blame] | 103 | #if defined(CONFIG_CMD_KGDB) |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 104 | #define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */ |
| 105 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
| 106 | #endif |
| 107 | |
| 108 | /* |
| 109 | * Miscellaneous configurable options |
| 110 | */ |
| 111 | #define CFG_LONGHELP /* undef to save memory */ |
| 112 | #define CFG_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */ |
| 113 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 114 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 115 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 116 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 117 | |
| 118 | #define CFG_MEMTEST_START 0xc0400000 /* memtest works on */ |
| 119 | #define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ |
| 120 | |
| 121 | #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
| 122 | |
| 123 | #define CFG_LOAD_ADDR 0xc0000000 /* default load address */ |
| 124 | |
| 125 | #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ |
| 126 | #define CFG_CPUSPEED 0x0a /* set core clock to 206MHz */ |
| 127 | |
| 128 | /* valid baudrates */ |
| 129 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| 130 | |
| 131 | /*----------------------------------------------------------------------- |
| 132 | * Stack sizes |
| 133 | * |
| 134 | * The stack sizes are set up in start.S using the settings below |
| 135 | */ |
| 136 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 137 | #ifdef CONFIG_USE_IRQ |
| 138 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 139 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 140 | #endif |
| 141 | |
| 142 | /*----------------------------------------------------------------------- |
| 143 | * Physical Memory Map |
| 144 | */ |
| 145 | #define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */ |
| 146 | #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ |
| 147 | #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ |
| 148 | #define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */ |
| 149 | #define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */ |
| 150 | |
| 151 | |
| 152 | #define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */ |
| 153 | #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ |
| 154 | #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ |
| 155 | #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ |
| 156 | |
| 157 | #define CFG_FLASH_BASE PHYS_FLASH_1 |
| 158 | |
| 159 | /*----------------------------------------------------------------------- |
| 160 | * FLASH and environment organization |
| 161 | */ |
| 162 | #if 1 |
| 163 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 164 | #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ |
| 165 | |
| 166 | /* timeout values are in ticks */ |
| 167 | #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ |
| 168 | #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ |
| 169 | #else |
wdenk | c35ba4e | 2004-03-14 22:25:36 +0000 | [diff] [blame] | 170 | /* REVISIT: This doesn't work on ADS GCPlus just yet: */ |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 171 | #define CFG_FLASH_CFI 1 /* flash is CFI conformant */ |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 172 | #define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */ |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 173 | #define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ |
| 174 | #define CFG_MAX_FLASH_BANKS 1 /* max # of memory banks */ |
| 175 | #define CFG_FLASH_INCREMENT 0 /* there is only one bank */ |
| 176 | #define CFG_MAX_FLASH_SECT 128 /* max # of sectors on one chip */ |
wdenk | c35ba4e | 2004-03-14 22:25:36 +0000 | [diff] [blame] | 177 | /*#define CFG_FLASH_PROTECTION 1 /--* hardware flash protection */ |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 178 | #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } |
| 179 | #endif |
| 180 | |
| 181 | #define CFG_ENV_IS_IN_FLASH 1 |
| 182 | #define CFG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */ |
| 183 | #define CFG_ENV_SIZE PHYS_FLASH_SECT_SIZE |
| 184 | |
| 185 | #endif /* __CONFIG_H */ |