blob: e31b859beb8aca0e8980d038723e06556f9d5357 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Tom Warren61c6d0e2012-12-11 13:34:15 +00002/*
3 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
Tom Warren61c6d0e2012-12-11 13:34:15 +00004 */
5
6/* Tegra30 high-level function multiplexing */
7
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
Tom Warren61c6d0e2012-12-11 13:34:15 +00009#include <asm/arch/clock.h>
10#include <asm/arch/funcmux.h>
11#include <asm/arch/pinmux.h>
12
13int funcmux_select(enum periph_id id, int config)
14{
15 int bad_config = config != FUNCMUX_DEFAULT;
16
17 switch (id) {
18 case PERIPH_ID_UART1:
19 switch (config) {
20 case FUNCMUX_UART1_ULPI:
Stephen Warren43eed912014-03-21 12:28:59 -060021 pinmux_set_func(PMUX_PINGRP_ULPI_DATA0_PO1,
22 PMUX_FUNC_UARTA);
23 pinmux_set_func(PMUX_PINGRP_ULPI_DATA1_PO2,
24 PMUX_FUNC_UARTA);
25 pinmux_set_func(PMUX_PINGRP_ULPI_DATA2_PO3,
26 PMUX_FUNC_UARTA);
27 pinmux_set_func(PMUX_PINGRP_ULPI_DATA3_PO4,
28 PMUX_FUNC_UARTA);
29 pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA0_PO1);
30 pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA1_PO2);
31 pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA2_PO3);
32 pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA3_PO4);
Tom Warren61c6d0e2012-12-11 13:34:15 +000033 break;
34 }
35 break;
36
37 /* Add other periph IDs here as needed */
38
39 default:
40 debug("%s: invalid periph_id %d", __func__, id);
41 return -1;
42 }
43
44 if (bad_config) {
45 debug("%s: invalid config %d for periph_id %d", __func__,
46 config, id);
47 return -1;
48 }
49 return 0;
50}