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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Shengzhou Liuf13321d2014-03-05 15:04:48 +08002/*
3 * Copyright 2014 Freescale Semiconductor
4 *
Shengzhou Liuf13321d2014-03-05 15:04:48 +08005 * Freescale T2080RDB board-specific CPLD controlling supports.
6 */
7
Tom Rinidec7ea02024-05-20 13:35:03 -06008#include <config.h>
Shengzhou Liuf13321d2014-03-05 15:04:48 +08009#include <command.h>
Tom Rinidec7ea02024-05-20 13:35:03 -060010#include <asm/io.h>
Shengzhou Liuf13321d2014-03-05 15:04:48 +080011#include "cpld.h"
12
13u8 cpld_read(unsigned int reg)
14{
Tom Rini6a5dccc2022-11-16 13:10:41 -050015 void *p = (void *)CFG_SYS_CPLD_BASE;
Shengzhou Liuf13321d2014-03-05 15:04:48 +080016
17 return in_8(p + reg);
18}
19
20void cpld_write(unsigned int reg, u8 value)
21{
Tom Rini6a5dccc2022-11-16 13:10:41 -050022 void *p = (void *)CFG_SYS_CPLD_BASE;
Shengzhou Liuf13321d2014-03-05 15:04:48 +080023
24 out_8(p + reg, value);
25}
26
27/* Set the boot bank to the alternate bank */
28void cpld_set_altbank(void)
29{
30 u8 reg = CPLD_READ(flash_csr);
31
32 reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_ALTBANK;
33 CPLD_WRITE(flash_csr, reg);
34 CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET);
35}
36
37/* Set the boot bank to the default bank */
38void cpld_set_defbank(void)
39{
40 u8 reg = CPLD_READ(flash_csr);
41
42 reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_DFLTBANK;
43 CPLD_WRITE(flash_csr, reg);
44 CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET);
45}
46
Simon Glassed38aef2020-05-10 11:40:03 -060047int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
Shengzhou Liuf13321d2014-03-05 15:04:48 +080048{
49 int rc = 0;
50
51 if (argc <= 1)
52 return cmd_usage(cmdtp);
53
54 if (strcmp(argv[1], "reset") == 0) {
55 if (strcmp(argv[2], "altbank") == 0)
56 cpld_set_altbank();
57 else
58 cpld_set_defbank();
59 } else {
60 rc = cmd_usage(cmdtp);
61 }
62
63 return rc;
64}
65
66U_BOOT_CMD(
67 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
68 "Reset the board or alternate bank",
69 "reset: reset to default bank\n"
70 "cpld reset altbank: reset to alternate bank\n"
71);