Jim Liu | 4359b33 | 2022-04-19 13:32:19 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (c) 2021 Nuvoton Technology Corp. |
| 4 | */ |
| 5 | |
Jim Liu | 4359b33 | 2022-04-19 13:32:19 +0800 | [diff] [blame] | 6 | #include <cpu_func.h> |
| 7 | #include <asm/armv7.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/arch/gcr.h> |
| 10 | |
| 11 | int print_cpuinfo(void) |
| 12 | { |
| 13 | struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; |
| 14 | unsigned int id, mdlr; |
| 15 | |
| 16 | mdlr = readl(&gcr->mdlr); |
| 17 | |
| 18 | printf("CPU: "); |
| 19 | |
| 20 | switch (mdlr) { |
| 21 | case POLEG_NPCM750: |
| 22 | printf("NPCM750 "); |
| 23 | break; |
| 24 | case POLEG_NPCM730: |
| 25 | printf("NPCM730 "); |
| 26 | break; |
| 27 | case POLEG_NPCM710: |
| 28 | printf("NPCM710 "); |
| 29 | break; |
| 30 | default: |
| 31 | printf("NPCM7XX "); |
| 32 | break; |
| 33 | } |
| 34 | |
| 35 | id = readl(&gcr->pdid); |
| 36 | switch (id) { |
| 37 | case POLEG_Z1: |
| 38 | printf("Z1 is no supported! @ "); |
| 39 | break; |
| 40 | case POLEG_A1: |
| 41 | printf("A1 @ "); |
| 42 | break; |
| 43 | default: |
| 44 | printf("Unknown\n"); |
| 45 | break; |
| 46 | } |
| 47 | |
| 48 | return 0; |
| 49 | } |
| 50 | |
| 51 | void s_init(void) |
| 52 | { |
| 53 | /* Invalidate L2 cache in lowlevel_init */ |
| 54 | v7_outer_cache_inval_all(); |
| 55 | } |
| 56 | |
| 57 | void enable_caches(void) |
| 58 | { |
| 59 | dcache_enable(); |
| 60 | } |
| 61 | |
| 62 | void disable_caches(void) |
| 63 | { |
| 64 | dcache_disable(); |
| 65 | } |