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git01.mediatek.com / filogic / uboot / 82a4ce2e956599b63b5eb0a88550740928079e8b / . / configs / mt7621_rfb_defconfig
blob: ec5996a2e0b7c3ad696ca62c8b0511d084197525 [file] [log] [blame]
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]1CONFIG_MIPS=y
Tom Rini295ab162022-10-28 20:27:10 -0400[diff] [blame]2CONFIG_SYS_HAS_NONCACHED_MEMORY=y
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x100000
4CONFIG_SPL_LIBCOMMON_SUPPORT=y
5CONFIG_SPL_LIBGENERIC_SUPPORT=y
6CONFIG_NR_DRAM_BANKS=1
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]7CONFIG_SF_DEFAULT_SPEED=20000000
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]8CONFIG_ENV_SIZE=0x1000
9CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-rfb"
10CONFIG_SPL_SERIAL=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]11CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]12CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
Tom Rinib9dc6842024-04-22 17:24:09 -0600[diff] [blame]13CONFIG_SPL_BSS_START_ADDR=0x80140000
14CONFIG_SPL_BSS_MAX_SIZE=0x80000
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]15CONFIG_SPL=y
16CONFIG_DEBUG_UART_BASE=0xbe000c00
17CONFIG_DEBUG_UART_CLOCK=50000000
18CONFIG_SYS_LOAD_ADDR=0x83000000
19CONFIG_ARCH_MTMIPS=y
20CONFIG_SOC_MT7621=y
Daniel Schwierzeckff21b842022-07-10 17:15:14 +0200[diff] [blame]21CONFIG_SYS_MIPS_TIMER_FREQ=440000000
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]22# CONFIG_MIPS_CACHE_SETUP is not set
23# CONFIG_MIPS_CACHE_DISABLE is not set
24CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
25CONFIG_MIPS_BOOT_FDT=y
26CONFIG_DEBUG_UART=y
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]27CONFIG_FIT=y
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]28CONFIG_SYS_BOOTM_LEN=0x2000000
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]29# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
30CONFIG_SYS_CONSOLE_INFO_QUIET=y
31CONFIG_SPL_MAX_SIZE=0x30000
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]32CONFIG_SPL_SYS_MALLOC_SIMPLE=y
33CONFIG_SPL_NOR_SUPPORT=y
34CONFIG_TPL=y
35# CONFIG_TPL_FRAMEWORK is not set
36# CONFIG_BOOTM_NETBSD is not set
37# CONFIG_BOOTM_PLAN9 is not set
38# CONFIG_BOOTM_RTEMS is not set
39# CONFIG_BOOTM_VXWORKS is not set
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]40# CONFIG_CMD_ELF is not set
41# CONFIG_CMD_XIMG is not set
42# CONFIG_CMD_CRC32 is not set
43# CONFIG_CMD_DM is not set
44CONFIG_CMD_GPIO=y
45# CONFIG_CMD_LOADS is not set
46CONFIG_CMD_MMC=y
47CONFIG_CMD_PART=y
48# CONFIG_CMD_PINMUX is not set
49CONFIG_CMD_SPI=y
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]50CONFIG_DOS_PARTITION=y
51# CONFIG_SPL_DOS_PARTITION is not set
52# CONFIG_ISO_PARTITION is not set
53CONFIG_EFI_PARTITION=y
54# CONFIG_SPL_EFI_PARTITION is not set
55CONFIG_PARTITION_TYPE_GUID=y
56CONFIG_SYS_RELOC_GD_ENV_ADDR=y
57CONFIG_NET_RANDOM_ETHADDR=y
58# CONFIG_I2C is not set
59# CONFIG_INPUT is not set
60CONFIG_MMC=y
61# CONFIG_MMC_QUIRKS is not set
62# CONFIG_MMC_HW_PARTITIONING is not set
63CONFIG_MMC_MTK=y
developere20fe272022-05-20 11:22:26 +0800[diff] [blame]64CONFIG_SPI_FLASH_BAR=y
65CONFIG_SPI_FLASH_EON=y
66CONFIG_SPI_FLASH_GIGADEVICE=y
67CONFIG_SPI_FLASH_ISSI=y
68CONFIG_SPI_FLASH_MACRONIX=y
69CONFIG_SPI_FLASH_SPANSION=y
70CONFIG_SPI_FLASH_STMICRO=y
71CONFIG_SPI_FLASH_WINBOND=y
72CONFIG_SPI_FLASH_XMC=y
73CONFIG_SPI_FLASH_XTX=y
74CONFIG_MEDIATEK_ETH=y
75CONFIG_PHY=y
76CONFIG_PHY_MTK_TPHY=y
77CONFIG_DEBUG_UART_SHIFT=2
78CONFIG_SPI=y
79CONFIG_MT7621_SPI=y
80CONFIG_SYSRESET=y
81CONFIG_SYSRESET_RESETCTL=y
82CONFIG_WDT=y
83CONFIG_WDT_MT7621=y
84# CONFIG_BINMAN_FDT is not set
85CONFIG_LZMA=y
86# CONFIG_GZIP is not set
87CONFIG_SPL_LZMA=y