blob: 732ac343b2b655df6caf41856326b78e15caa05e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Elaine Zhang6e9a3a72017-12-19 18:22:37 +08002/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
Elaine Zhang6e9a3a72017-12-19 18:22:37 +08004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -07009#include <malloc.h>
Elaine Zhang6e9a3a72017-12-19 18:22:37 +080010#include <reset-uclass.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060011#include <linux/bitops.h>
Elaine Zhang6e9a3a72017-12-19 18:22:37 +080012#include <linux/io.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +080013#include <asm/arch-rockchip/hardware.h>
Simon Glass95588622020-12-22 19:30:28 -070014#include <dm/device-internal.h>
Elaine Zhang6e9a3a72017-12-19 18:22:37 +080015#include <dm/lists.h>
16/*
17 * Each reg has 16 bits reset signal for devices
18 * Note: Not including rk2818 and older SoCs
19 */
20#define ROCKCHIP_RESET_NUM_IN_REG 16
21
22struct rockchip_reset_priv {
23 void __iomem *base;
24 /* Rockchip reset reg locate at cru controller */
25 u32 reset_reg_offset;
26 /* Rockchip reset reg number */
27 u32 reset_reg_num;
28};
29
30static int rockchip_reset_request(struct reset_ctl *reset_ctl)
31{
32 struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
33
34 debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_num=%d)\n", __func__,
35 reset_ctl, reset_ctl->dev, reset_ctl->id, priv->reset_reg_num);
36
37 if (reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num)
38 return -EINVAL;
39
40 return 0;
41}
42
Elaine Zhang6e9a3a72017-12-19 18:22:37 +080043static int rockchip_reset_assert(struct reset_ctl *reset_ctl)
44{
45 struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
46 int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG;
47 int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG;
48
49 debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
50 reset_ctl, reset_ctl->dev, reset_ctl->id,
51 priv->base + (bank * 4));
52
53 rk_setreg(priv->base + (bank * 4), BIT(offset));
54
55 return 0;
56}
57
58static int rockchip_reset_deassert(struct reset_ctl *reset_ctl)
59{
60 struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
61 int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG;
62 int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG;
63
64 debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
65 reset_ctl, reset_ctl->dev, reset_ctl->id,
66 priv->base + (bank * 4));
67
68 rk_clrreg(priv->base + (bank * 4), BIT(offset));
69
70 return 0;
71}
72
73struct reset_ops rockchip_reset_ops = {
74 .request = rockchip_reset_request,
Elaine Zhang6e9a3a72017-12-19 18:22:37 +080075 .rst_assert = rockchip_reset_assert,
76 .rst_deassert = rockchip_reset_deassert,
77};
78
79static int rockchip_reset_probe(struct udevice *dev)
80{
81 struct rockchip_reset_priv *priv = dev_get_priv(dev);
82 fdt_addr_t addr;
83 fdt_size_t size;
84
85 addr = dev_read_addr_size(dev, "reg", &size);
86 if (addr == FDT_ADDR_T_NONE)
87 return -EINVAL;
88
89 if ((priv->reset_reg_offset == 0) && (priv->reset_reg_num == 0))
90 return -EINVAL;
91
92 addr += priv->reset_reg_offset;
93 priv->base = ioremap(addr, size);
94
95 debug("%s(base=%p) (reg_offset=%x, reg_num=%d)\n", __func__,
96 priv->base, priv->reset_reg_offset, priv->reset_reg_num);
97
98 return 0;
99}
100
101int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number)
102{
103 struct udevice *rst_dev;
104 struct rockchip_reset_priv *priv;
105 int ret;
106
Eugen Hristevca4134a2023-04-11 10:20:40 +0300107 ret = device_bind_driver_to_node(pdev, "rockchip_reset", "reset",
108 dev_ofnode(pdev), &rst_dev);
Elaine Zhang6e9a3a72017-12-19 18:22:37 +0800109 if (ret) {
110 debug("Warning: No rockchip reset driver: ret=%d\n", ret);
111 return ret;
112 }
113 priv = malloc(sizeof(struct rockchip_reset_priv));
114 priv->reset_reg_offset = reg_offset;
115 priv->reset_reg_num = reg_number;
Simon Glass95588622020-12-22 19:30:28 -0700116 dev_set_priv(rst_dev, priv);
Elaine Zhang6e9a3a72017-12-19 18:22:37 +0800117
118 return 0;
119}
120
121U_BOOT_DRIVER(rockchip_reset) = {
122 .name = "rockchip_reset",
123 .id = UCLASS_RESET,
124 .probe = rockchip_reset_probe,
125 .ops = &rockchip_reset_ops,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700126 .priv_auto = sizeof(struct rockchip_reset_priv),
Elaine Zhang6e9a3a72017-12-19 18:22:37 +0800127};