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wdenk5f495752004-02-26 23:46:20 +00001/*
2 * Copyright (C) 2004 by FS Forth-Systeme GmbH.
3 * All rights reserved.
4 * Markus Pietrek <mpietrek@fsforth.de>
5 *
6 * Configuation settings for the NetSilicon NS9750 DevBoard
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*
wdenk5f495752004-02-26 23:46:20 +000031 * High Level Configuration Options
32 * (easy to change)
33 */
34#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
35#define CONFIG_NS9750 1 /* in an NetSilicon NS9750 SoC */
36#define CONFIG_NS9750DEV 1 /* on an NetSilicon NS9750 DevBoard */
37
38/* input clock of PLL */
39#define CONFIG_SYS_CLK_FREQ 324403200 /* Don't use PLL. SW11-4 off */
40
41#define CPU_CLK_FREQ (CONFIG_SYS_CLK_FREQ/2)
42#define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4)
43#define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8)
44
45#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
46/*@TODO #define CONFIG_STATUS_LED*/
47#define CONFIG_USE_IRQ
48
49/*
50 * Size of malloc() pool
51 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
wdenk5f495752004-02-26 23:46:20 +000053
54/*
55 * Hardware drivers
56 */
Jean-Christophe PLAGNIOL-VILLARD0e9551b2008-08-13 01:40:39 +020057#define CONFIG_NS9750_UART 1 /* use on-chip UART */
wdenk5f495752004-02-26 23:46:20 +000058
59/*
60 * select serial console configuration
61 */
Wolfgang Denka1be4762008-05-20 16:00:29 +020062#define CONFIG_CONS_INDEX 1 /* Port B */
wdenk5f495752004-02-26 23:46:20 +000063
64/* allow to overwrite serial and ethaddr */
65#define CONFIG_ENV_OVERWRITE
66
67#define CONFIG_BAUDRATE 38400
68
wdenk5f495752004-02-26 23:46:20 +000069
Jon Loeliger74fdb632007-07-04 22:33:07 -050070/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050071 * BOOTP options
72 */
73#define CONFIG_BOOTP_BOOTFILESIZE
74#define CONFIG_BOOTP_BOOTPATH
75#define CONFIG_BOOTP_GATEWAY
76#define CONFIG_BOOTP_HOSTNAME
77
78
79/*
Jon Loeliger74fdb632007-07-04 22:33:07 -050080 * Command line configuration.
81 */
82
83#define CONFIG_CMD_BDI
84#define CONFIG_CMD_CONSOLE
85#define CONFIG_CMD_LOADB
86#define CONFIG_CMD_LOADS
87#define CONFIG_CMD_MEMORY
Jon Loeliger74fdb632007-07-04 22:33:07 -050088#define CONFIG_CMD_PING
89
wdenk5f495752004-02-26 23:46:20 +000090
91#define CONFIG_BOOTDELAY 3
Wolfgang Denka1be4762008-05-20 16:00:29 +020092/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
wdenk5f495752004-02-26 23:46:20 +000093
94#define CONFIG_ETHADDR 00:04:f3:ff:ff:fb /*@TODO unset */
95#define CONFIG_NETMASK 255.255.255.0
96#define CONFIG_IPADDR 192.168.42.30
97#define CONFIG_SERVERIP 192.168.42.1
98
99/*#define CONFIG_BOOTFILE "elinos-lart" */
100/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
101
Jon Loeliger74fdb632007-07-04 22:33:07 -0500102#if defined(CONFIG_CMD_KGDB)
wdenk5f495752004-02-26 23:46:20 +0000103#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
104/* what's this ? it's not used anywhere */
105#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
106#endif
107
108/*
109 * Miscellaneous configurable options
110 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200111#define CONFIG_SYS_LONGHELP /* undef to save memory */
112#define CONFIG_SYS_PROMPT "NS9750DEV # " /* Monitor Command Prompt */
113#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
114#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
115#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
116#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk5f495752004-02-26 23:46:20 +0000117
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200118#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
119#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */
wdenk5f495752004-02-26 23:46:20 +0000120
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200121#define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */
wdenk5f495752004-02-26 23:46:20 +0000122
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#define CONFIG_SYS_HZ (CPU_CLK_FREQ/64)
wdenk5f495752004-02-26 23:46:20 +0000124
wdenk5f495752004-02-26 23:46:20 +0000125#define NS9750_ETH_PHY_ADDRESS (0x0000)
126
127/*-----------------------------------------------------------------------
128 * Stack sizes
129 *
130 * The stack sizes are set up in start.S using the settings below
131 */
132#define CONFIG_STACKSIZE (128*1024) /* regular stack */
133#ifdef CONFIG_USE_IRQ
134#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
135#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
136#endif
137
138/*-----------------------------------------------------------------------
139 * Physical Memory Map
140 */
141/* TODO */
142#define CONFIG_NR_DRAM_BANKS 2 /* we have 1 bank of DRAM */
143#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
144#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
145#define PHYS_SDRAM_2 0x10000000 /* SDRAM Bank #1 */
146#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
147
148#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
149
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200150#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenk5f495752004-02-26 23:46:20 +0000151
152/*-----------------------------------------------------------------------
153 * FLASH and environment organization
154 */
155
156/* @TODO*/
157#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
158#if 0
159#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
160#endif
161
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200162#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
wdenk5f495752004-02-26 23:46:20 +0000163#ifdef CONFIG_AMD_LV800
164#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200165#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
166#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
wdenk5f495752004-02-26 23:46:20 +0000167#endif
168#ifdef CONFIG_AMD_LV400
169#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200170#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
171#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
wdenk5f495752004-02-26 23:46:20 +0000172#endif
173
174/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200175#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
176#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenk5f495752004-02-26 23:46:20 +0000177
178/* @TODO */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200179/*#define CONFIG_ENV_IS_IN_FLASH 1*/
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200180#define CONFIG_ENV_IS_NOWHERE
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200181#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
wdenk5f495752004-02-26 23:46:20 +0000182
183#ifdef CONFIG_STATUS_LED
184
185extern void __led_init(led_id_t mask, int state);
186extern void __led_toggle(led_id_t mask);
187extern void __led_set(led_id_t mask, int state);
188
189#endif /* CONFIG_STATUS_LED */
190
191#endif /* __CONFIG_H */